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ABSTRACT: Two-dimensional magnetic recording (TDMR) together with shingled magnetic recording (SMR) are technologies proposed to extend the life of conventional granular magnetic recording. The grain flipping probability (GFP) model has been proposed to mimic the performance of micromagnetic ( μ-mag) simulations for the purpose of signal reproduction. Other work in TDMR includes the proposal of a Gaussian mixture model (GMM) that produces improved likelihood information at the output of the detector, combined with low density parity check (LDPC) codes. The contribution of this paper is threefold. First, we aim to simulate a TDMR/SMR recording system with the GFP model, both with and without the GMM detector, and with various random and structured LDPC codes, of both 4 k and 16 k block lengths, to determine areal densities that might be achieved. Second, we perform a comparison of the various model order reduced (MOR) GFP implementations to compare the effect of writing with various factors taken out of the picture. Third, we perform a validation of the GFP model and the setup as a whole, by running the system with a parameter set close to that of conventional recording. The results of these experiments give an assurance of the validity of our model, give an indication of the expected density that might be achieved in a TDMR/SMR system, and give a direction for which parameter(s) in magnetic recording systems might be optimized to yield the most gain.
IEEE Transactions on Magnetics 11/2011; · 1.36 Impact Factor
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ABSTRACT: In space, radiation particles can introduce temporary or permanent errors in memory systems. To protect against potential memory faults, either thick shielding or error correcting codes (ECC) are used. Thick shielding translates into increased mass and conventional ECCs designed for memories are typically capable of only correcting a single error and detecting a double error. Decoding is usually performed through hard-decisions where bits are treated as either correct or flipped in polarity. In this work, we demonstrate that low-density parity-check (LDPC) codes that are already prevalent in many communication applications can also be used to protect memories in space. We develop a channel that models memory error events in a space radiation environment. We describe how to compute soft symbol reliabilities on our channel and compare the performance of soft-decision decoding LDPC codes against conventional hard-decision decoding of Reed-Solomon (RS) codes and Bose-Chaudhuri-Hoquenghem (BCH) codes for a specific memory structure.
Global Telecommunications Conference (GLOBECOM 2010), 2010 IEEE; 01/2011
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ABSTRACT: Nonbinary low-density parity check (LDPC) codes can provide coding gains over binary LDPC codes at the cost of increased complexity. For magnetic recording channels, optimal detectors for the nonbinary codes are symbol-based, which are significantly more complex than binary detectors. In this paper, we investigate the feasibility of using much less complex bit-based soft output Viterbi algorithm (SOVA) as a channel detector for nonbinary LDPC codes and performing turbo iterations between the SOVA and the nonbinary LDPC decoder. We show that performance gains can still be obtained by the turbo iterations by using the bit-based SOVA, although the performance gains are suboptimal to the symbol-based detectors. This scheme can be useful in low-complexity nonbinary LDPC coding systems.
IEEE Transactions on Magnetics 07/2010; · 1.36 Impact Factor
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ABSTRACT: Two-dimensional magnetic recording (TDMR) is a new magnetic recording paradigm that aims to record one bit of information in one or a few grains, with the goal of achieving a recording density of nearly 10 Tbit/in<sup>2</sup>. In addition to the usual noise, a TDMR channel experiences the problem that some bits are never recorded because of the randomness of grain size and location. Thus, it is believed that a key component of a TDMR channel is two-dimensional (2-D) signal processing along with a strong error correction code. In this study, the TDMR channel is investigated based on a random Voronoi grain model and a signal processing architecture is proposed. Here, a 2-D linear minimum mean squared error (LMMSE) equalizer and a low-density parity-check (LDPC) code are employed and the effects of unwritten bits are modeled by a Gaussian mixture model. In numerical simulations, the proposed architecture shows the feasibility of user bit densities near 10 Tbit/in<sup>2</sup> for media with a 20 Tgrains/in<sup>2</sup> grain density.
IEEE Transactions on Magnetics 07/2010; · 1.36 Impact Factor
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ABSTRACT: Recently, 32 k-bit sector size for hard disk drives is being investigated to take advantage of the superior performance of long error correcting codes. Meanwhile, low-density parity-check (LDPC) codes have been actively investigated for obtaining coding gains over conventional Reed-Solomon (RS) codes mainly for 4 k-bit sectors. In this paper, the coding gain of a 32 k-bit LDPC code over a 4 k-bit LDPC code, a 32 k-bit RS code, and a 4 k-bit RS code in magnetic recording channels is investigated. The decoding complexity of 32 k-bit LDPC codes and 4 k-bit LDPC codes is also discussed. It is important to evaluate whether the coding gains are enough to justify the increased complexity. Using the 32 k-bit LDPC code, 0.8-dB gain over the 32 k-bit RS code or the 4 k-bit LDPC code (the two schemes coincidentally showed similar performance) at 32 k-bit block error rate (BLER) 10<sup>-3</sup>, and 1.6-dB gain over the 4 k-bit RS code were obtained. It is shown that 32 k-bit LDPC codes require a larger number of iterations than the 4 k-bit LDPC codes. It is also shown that there is much room to improve the design of 32 k-bit LDPC codes than the code used in the simulation. To illustrate the potential, quasicyclic LDPC codes with column weights up to 13 with girth 6 are investigated.
IEEE Transactions on Magnetics 07/2010; · 1.36 Impact Factor
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ABSTRACT: The algebraic soft-decision decoding algorithm (ASD) requires a reliability matrix as its input. In this paper, a new method to construct the reliability matrix over partial response (PR) channels of interest in magnetic recording is proposed by using recently introduced pattern-output Viterbi algorithm (POVA). A modified bit-level generalized minimum distance (BGMD) algorithm is also proposed with the POVA to achieve performance gains over PR channels that are as large as gains as over AWGN channels.
IEEE Communications Letters 06/2010; · 0.98 Impact Factor
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ABSTRACT: Towards the goal of achieving better error correction performance in data storage systems, iterative soft decoding of low density parity check (LDPC) codes and soft-decision decoding of Reed-Solomon (RS) codes have started receiving increasing research attention. However, even with increased computing power, complexities of soft-decision decoding algorithms are still too high for real products which require high throughput and small hardware area. Another problem is that the performance gains of those approaches are smaller for magnetic recording channels than they are for memoryless additive white Gaussian noise (AWGN) channels. We propose a new soft-decision decoding algorithm (based on the Chase algorithm), which takes advantage of pattern reliability instead of symbol reliability or bit reliability. We also present a modified Viterbi algorithm that provides probable error patterns with corresponding reliabilities. Simulation results of the proposed algorithms over the partial response (PR) channel show attractive performance gains. The proposed algorithm dramatically reduces the number of iterations compared to the conventional Chase2 algorithm over the PR channel.
IEEE Journal on Selected Areas in Communications 03/2010; · 3.41 Impact Factor
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ABSTRACT: Low-density parity-check (LDPC) codes offer a promising error correction approach for high-density magnetic recording systems due to their near-Shannon limit error-correcting performance. However, evaluation of LDPC codes at the extremely low bit error rates (BER) required by hard disk drive systems, typically around 10<sup>-12</sup> to 10<sup>- 15</sup>, cannot be carried out on high-performance workstations using conventional Monte Carlo techniques in a tractable amount of time. Even field-programmable gate array (FPGA) emulation platforms take a few weeks to reach BER between 10<sup>-11</sup> and 10<sup>-12</sup>. Thus, we implemented a highly parallel FPGA processing cluster to emulate a perpendicular magnetic recording channel, which enabled us to accelerate the emulation by > 100times over the fastest reported emulation. This increased throughput enabled us to characterize the performance of LDPC code BER down to near 10<sup>-14</sup> and investigate its error floor.
IEEE Transactions on Magnetics 11/2009; · 1.36 Impact Factor
