M. AbdelGhany

The American University in Cairo, Al Qāhirah, Al Qāhirah, Egypt

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Publications (2)5.17 Total impact

  • [show abstract] [hide abstract]
    ABSTRACT: In this paper, two high-voltage charge pumps (CPs) are introduced. In order to minimize the area of the pumping capacitors, which dominates the overall area of the CP, high-density capacitors have been utilized. Nonetheless, these high-density capacitors suffer from low breakdown voltage, which is not compatible with the targeted high-voltage application. To circumvent the breakdown limitation, a special clocking scheme is used to limit the maximum voltage across any pumping capacitor. The two CP circuits were fabricated in a 0.6- μm CMOS technology with poly0-poly1 capacitors. The output voltage of the two CPs reached 42.8 and 51 V, whereas the voltage across any capacitor did not exceed the value of the input voltage. Compared with other designs reported in the literature, the proposed CP provides the highest output voltage, which makes it more suitable for tuning MEMS devices.
    IEEE Transactions on Industrial Electronics 01/2013; 60(10):4683-4693. · 5.17 Impact Factor
  • [show abstract] [hide abstract]
    ABSTRACT: A CMOS variable gain driving circuit with output signal amplitude control for gyroscopes with wide range of quality factors is presented. The driving circuit can be used for gyroscopes with Q values higher than 500. The circuit uses a current-commutating switching mixer to control the gyroscope driving signal level. Conventional driving circuits use automatic gain control (AGC) which suffers from limited linear range and the need for an off-chip capacitor for the peak detector and loop filter. Two stage variable gain amplifier is used in the proposed design to ensure enough gain for oscillation for such a wide range of quality factors. Analog and digital amplitude control methods are used to cover wide range of driving signal amplitude with enough accuracy to hit the maximum driving signal level without sacrificing gyroscope linearity. Due to the high DC gain of the amplifier chain, DC offset resulting from mismatches might saturate the amplifier output. DC offset correction is employed using a secondary negative feedback loop. The proposed driving circuit is being fabricated in 0.6 μm CMOS technology.
    Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on; 09/2010