Gi-Hyon Ryu

Seoul National University, Seoul, Seoul, South Korea

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Publications (7)1.04 Total impact

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    ABSTRACT: A new Marchand balun for MMIC is proposed which uses air-gap stacked structures and does not need any dielectric process. To design the newly proposed Marchand balun, simple graphical design method was used, which is based on Tsai and Gupta's generalized coupled lines model. The simple design results were compared with a general full-wave analysis. In this case, HP-Momentum simulator was used
    Microwave Symposium Digest, 2001 IEEE MTT-S International; 02/2001
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    ABSTRACT: A simple broadside-coupled line structure for MMIC is proposed which uses air-gap stacked microstrip lines and does not require any dielectric process. The analysis and optimization of the coupled line structure were performed by using an electromagnetic simulator. The fabricated 3-dB coupler shows broad-band characteristics (23-45 GHz) with the coupling loss of 3.33±0.46 dB and the transmission loss of 3.73±0.43 dB
    IEEE Microwave and Guided Wave Letters 02/2000;
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    ABSTRACT: This paper represents the device parameter influence of GaAs PHEMT with different gate lengths on switching performance and its application in DC-50GHz wide-band SPST monolithic switch ICs. From the characteristic of GaAs PHEMT and monolithic switch, especially, it is proved experimentally that source-to-drain capacitance dependent on gate length is a very important characteristic for improving the isolation performance of GaAs PHEMT switch at high-impedance state
    Microwave Symposium Digest. 2000 IEEE MTT-S International; 02/2000
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    ABSTRACT: A novel low impedance line for MMIC is proposed which uses air-gap stacked microstrip structure and does not require any dielectric process. The proposed transmission line has the width of about 1/3 times that of the conventional microstrip line. It shows lower transmission loss than thin film low impedance transmission line. The proposed transmission line was used to the matching stub of the balanced amplifier MMIC based on the 0.25 μm gate GaAs P-HEMT technology, reducing the chip size by 69% compared with the conventional microstrip-based design
    Microwave Symposium Digest. 2000 IEEE MTT-S International; 02/2000
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    ABSTRACT: A cascode distributed amplifier IC has been designed and fabricated using a 0.25 μm non-recessed self-aligned gate (SAG) GaAs P-HEMT and coplanar IC technology. Through the SAG process and an optimised epitaxial layer structure, excellent device performance has been obtained without gate recessing, and the device yield and uniformity were high enough for IC applications. The fabricated seven-stage cascode distributed amplifier IC has an 11 dB gain and a 3 dB bandwidth of 50 GHz with excellent uniformity in the IC characteristics. The gain-bandwidth product obtained (180 GHz) is comparable or even superior to that of the previous distributed amplifiers based on a shorter-length, recessed gate GaAs P-HEMT
    Electronics Letters 11/1999; · 1.04 Impact Factor
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    ABSTRACT: This paper proposes a new, differential-pair circuit configuration of the floating active inductor. Since this technique leads to a symmetric structure, the derived floating active inductor exhibits fully symmetrical 2-port characteristics at all frequencies like an ideal inductor, and it also shows more than four times wider dynamic range compared to the conventional circuit. In addition, this configuration can be easily extended to the negative inductance circuit. The simple circuit analyses and simulation results are presented
    Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on; 07/1997
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    ABSTRACT: A new FET extrinsic parameter extraction method is proposed, in which all the extrinsic elements can be determined directly from the S-parameters at pinch-off bias. It utilizes the measurement data of various gate-width FET's and the simple scaling property of each equivalent circuit parameters, eliminating some complex measurement steps such as forward gate bias measurement. Since the gate-width scaling characteristics are taken into account, the proposed method can be utilized for the MMIC design where the optimization of the FET gate-width is important. The proposed method was successfully applied to the modeling of 0.25 um GaAs P-HEMT.