Meng-Ting Hsu

National Yunlin University of Science and Technology, Tou-liu, Taiwan, Taiwan

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Publications (12)5.13 Total impact

  • Meng-Ting Hsu, Tsung-Han Han, Yao-Yen Lee
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    ABSTRACT: A CMOS LC voltage controlled oscillator (VCO) based on current reused topology with low phase noise and low power consumption is presented for IEEE 802.11a (Seller et al. A 10 GHz distributed voltage controlled oscillator for WLAN application in a VLSI 65 nm CMOS process, in: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 3–5 June, 2007, pp. 115–118.) application. The chip1 is designed with the tail current-shaping technique to obtain the phase noise −116.1 dBc/Hz and power consumption 3.71 mW at the operating frequency 5.2 GHz under supply voltage 1.4 V. The second chip of proposed VCO can achieve power consumption Sub 1 mW and is still able to maintain good phase noise. The current reused and body-biased architecture can reduce power consumption, and better phase noise performance is obtained through raising the Q value. The measurement result of the VCO oscillation frequency range is from 5.082 GHz to 5.958 GHz with tuning range of 15.8%. The measured phase noise is −115.88 dBc/Hz at 1 MHz offset at the operation frequency of 5.815 GHz. and the dc core current consumption is 0.71 mA at a supply voltage of 1.4 V. Its figure of merit (FOM) is −191 dBc/Hz. Two circuits were taped out by TSMC 0.18 μm 1P6M process.
    Microelectronics Journal 01/2014; 45(6):627–633. · 0.91 Impact Factor
  • Meng-Ting Hsu, Yu-Hsien Lin, Yang Jing-Cheng
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    ABSTRACT: A low-power low-noise amplifier (LNA) utilized a resistive inverter configuration feedback amplifier to achieve the broadband input matching purposes. To achieve low power consumption and high gain, the proposed LNA utilizes a current-reused technique and a splitting-load inductive peaking technique of a resistive-feedback inverter for input matching. Two wideband LNAs are implemented by TSMC 0.18 μm CMOS technology. The first LNA operates at 2–6 GHz. The minimum noise figure is 3.6 dB. The amplifier provides a maximum gain (S21) of 18.5 dB while drawing 10.3 mW from a 1.5-V supply. This chip area is 1.028×0.921 mm2. The second LNA operates at 3.1–10.6 GHz. By using self-forward body bias, it can reduce supply voltage as well as save bias current. The minimum noise figure is 4.8 dB. The amplifier provides a maximum gain (S21) of 17.8 dB while drawing 9.67 mW from a 1.2-V supply. This chip area is 1.274×0.771 mm2.
    Microelectronics Journal 01/2014; · 0.91 Impact Factor
  • Source
    Meng-Ting Hsu, Wei-Jhih Li, Chien-Ta Chiu
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    ABSTRACT: In this paper, we present low phase noise and low power of the modified current-reused VCOs for 10 GHz application. Three chips are implemented by the standard 0.18 μm CMOS process. The improvement of the VCOs' three chips is described step by step.The traditional current-reused circuit with a wide tuning range of 17.2% is presented in the first chip. It has a phase noise-118 dBc/Hz at 1 MHz offset and 5 mW core power dissipation with a voltage supply under 1.5 V. The performance of FOM is as high as −191.8 dBc/Hz. Extra NMOS cross-coupled pairs inside the traditional current-reused circuit in the second chip is proposed to speed up the oscillation and stability. The phase noise is −106.19 dBc/Hz and the core power dissipation is 3 mW with a voltage supply under 1.5 V. For the third chip, two dc level shifters are adopted to improve the symmetry of the output signal and to decrease noise interference. The phase noise and core power are -106.9 dBc/Hz and 2.88 mW, respectively. It also has a high performance of FOM with −182.4 dBc/Hz.
    Microelectronics Journal 02/2013; 44(2):145–151. · 0.91 Impact Factor
  • Meng-Ting Hsu, Shih-Yu Hsu, Yu-Hwa Lin
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    ABSTRACT: This paper presents a low-power and low-noise amplifier (LNA) with resistive-feedback configuration. The design consists of two resistive-feedback amplifiers. In order to reduce the chip area, a resistive-feedback inverter is adopted for input matching. The output stage adopts basic topology of an RC feedback for output matching, and adds two inductors for inductive peaking at the high band. The implemented LNA has a peak gain of 10.5 dB, the input reflection coefficient S11 is lower than −8 dB and the output reflection S22 is lower than −10.8 dB, and noise figure of 4.2–5.2 dB is between 1 and 10 GHz while consuming 12.65 mW from a 1.5 V supply. The chip area is only 0.69 mm2 and the figure of merit is 6.64 including the area estimation. The circuit was fabricated in a TSMC 0.18 um CMOS process.
    International Journal of Microwave and Wireless Technologies 02/2013; 5(01). · 0.57 Impact Factor
  • Meng-Ting Hsu, Yi-Cheng Chang, Yu-Zhang Huang
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    ABSTRACT: This paper presents two low power UWB LNAs with common source topology. The power reduction is achieved by the current-reused technique. The gain and noise enhancement of the proposed circuit is based on an output buffer which is used by a common source amplifier with shunt–shunt feedback. Chip1 is an adopted T-match input network of 50 Ω matching in the required band. Measurements show that the S11 and S22 are less than −10 dB, and the maximum amplifier gain S21 gives 9.7 dB, and the noise figure is 4.2 dB, the IIP3 is −8.5 dBm, and the power consumption is 11 mW from 1.1 V supply voltage. The input matching of chip2 is adopted from a LC high pass filter and source degenerated inductor. The output buffer with the RC-feedback topology can improve the gain, increase the IIP3, restrain the noise, improve the noise figure and decrease the DC power dissipation. Measurements show 13.2 dB of power gain, 3.33 dB of noise figure, and the IIP3 is −3.3 dBm. It consumes 9.3 mW from 1.5 V supply voltage. These two chips are implemented in a 0.18 μm TSMC CMOS process.
    Microelectronics Journal 01/2013; 44(12):1223–1230. · 0.91 Impact Factor
  • Meng-Ting Hsu, Wei-Jhih Li, Yu-Tuan Hsu
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    ABSTRACT: This paper presents a low phase noise wideband CMOS VCO based on the self-bias tail transistor technique and harmonic suppression using a capacitance ground. This VCO utilizes switching capacitor arrays in which four channels are able to be selected for multi-band application. Moreover, the design of CMOS VCO makes good use of the self-bias tail transistor and capacitance ground filter technique to reduce the phase noise. The MOS varactors are used as fine tuning for wideband operating application. The fully integrated VCO provides excellent performance with high FOM −193 dBc/Hz. The bandwidth of the frequency is 1.1 GHz and the tuning range is 13.8%. The power dissipation of the core circuit is 8.28 mW under a 1.8 V supply and phase noise is measured as low as −123.6 dBc/Hz at 1 MHz offset under 8.5 GHz oscillation frequencies. This VCO was made by the TSMC 0.18 μm 1P6M CMOS standard process and the chip area is 0.75×0.69 (mm2).
    Microelectronics Journal 01/2013; · 0.91 Impact Factor
  • Meng-Ting Hsu, Yu-Tuan Hsu, Yao-Yen Lee
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    ABSTRACT: The paper presents a low power and low phase noise voltage controlled oscillator (VCO) for IEEE 802.11a applications. The quality enhancement and reducing current architecture is designed to improve phase noise and power. The measured results exhibited phase noise -115.62 dBc/Hz at 1MHz offset frequency and measured tuning range is about 14.5% from 5.26GHz to 6.08GHz. The power dissipation is 2.26mW and FOM is -187dBc/Hz. The chip fabrication of VCO is made by TSMC 0.18μm 1P6M CMOS standard process.
    Microwave Conference Proceedings (APMC), 2013 Asia-Pacific; 01/2013
  • Source
    Meng-Ting Hsu, Chien-Ta Chiu, Shiao-Hui Chen
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    ABSTRACT: This VCO presents a technique of operating narrowband into wideband, employs switching tail current technique and maintains the good phase noise performance. The switching capacitor modules offered multi-channels can enhance oscillator frequency range and the KVCO is still small. This VCO operated from 3.64 to 5.37 GHz with 38% tuning range. The power consumption is 13.7 mW by a 1.8 V supply voltage and measured phase noise in all tuning range is less than -122 dBc/Hz at 1 MHz offset.
    04/2010; , ISBN: 978-953-307-087-2
  • Meng-Ting Hsu, Chien-Ta Chiu
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    ABSTRACT: This paper presents a low power 10 GHz voltage-controlled oscillator (VCO) with current reused topology and uses negative resistance enhancement technique. The proposed VCO operates from 9.08 GHz to 10.67 GHz with a tuning range of 16.1%. The VCO has a phase noise of -106.19 dBc/Hz at 1 MHz offset from 10.19 GHz oscillation frequency with 3 mW core power dissipation and 16.27 mW total power dissipation draw from a 1.5 V power supply. This VCO was made by TSMC 0.18 ¿m 1P6M CMOS standard process and the chip area is 0.505 × 0.573 (mm<sup>2</sup>).
    Microwave Conference, 2009. APMC 2009. Asia Pacific; 01/2010
  • Meng-Ting Hsu, Hong-Jyun Li
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    ABSTRACT: This paper presents a very low supply voltage, low phase noise and wide tuning range CMOS LC voltage-controlled oscillator with a transformer feedback for a wide-band front-end receiver by a standard 0.18-mum CMOS process. The VCO take an optimum differential transformer to achieve maximize quality factor and minimize the chip area and switching capacitor module are used to maintain a large tuning range. The VCO core power consumption is 6.9 mW from 0.6 V supply and operates with a wide-band from 4.16-5.47 GHz. The measured phase noise is -111.5 dBc/Hz at 1 MHz offset from the carrier frequency at 5.45 GHz.
    Microwave Conference, 2008. APMC 2008. Asia-Pacific; 01/2009
  • Source
    Meng-Ting Hsu, Shiao-Hui Chen, Wei-Jhih Li
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    ABSTRACT: This paper presents a low phase noise of the complementary cross-coupled voltage-controlled oscillator, which oscillates at a range of 3.64 ~ 5.37 GHz. This VCO utilizes switching capacitor modules in which eight channels are able to be selected. Moreover, MOS varactors are used as fine tuning. The fully integrated VCO provides excellent performance. The bandwidth of frequency is 1.73 GHz and the tuning range is 38%. The power dissipation of the core circuit is 13.7 mW under 1.8 V supply and phase noises all are smaller than -122 dBc/Hz at 1 MHz offset. This VCO was made by TSMC 0.18 mum 1P6M CMOS standard process and the chip area is 0.96 times 0.83 (mm<sup>2</sup>).
    Microwave Conference, 2007. APMC 2007. Asia-Pacific; 01/2008
  • Meng-Ting Hsu, Wei-Jhih Li
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    ABSTRACT: This paper presents a low phase noise of the complementary cross-coupled voltage-controlled oscillator, which oscillates at a range of 7.42~8.52 GHz. This VCO utilizes switching capacitor modules in which four channels are able to be selected. Moreover, We makes good use of filtering technique for reduction 1/f noise, and MOS varactors are used as fine tuning. The fully integrated VCO provides excellent performance with high FOM -193 dBc/Hz. The bandwidth of frequency is 1.1 GHz and the tuning range is 13.8%. The power dissipation of the core circuit is 8.28 mW under 1.8 V supply and phase noises all are smaller than -124.3 dBc/Hz at 1 MHz offset. This VCO was made by TSMC 0.18 mum 1P6M CMOS standard process and the chip area is 0.75times 0.69 (mm2).
    01/2008;