I.B. Bhat

Publications (32)50.25 Total impact

• Article: High-Voltage 4H-SiC Bipolar Junction Transistors With Epitaxial Regrowth of the Base Contact

  S. Sharma, C. Li, I.B. Bhat, T.P. Chow
  [show abstract] [hide abstract]
  ABSTRACT: High-voltage (4-6 kV) 4H-SiC-based bipolar junction transistors were designed, fabricated, and characterized. Various design and process optimization techniques to improve the on state and the forward blocking performance of these devices were studied and incorporated. Using the conventional base contact implantation process, devices with blocking voltages up to 4 kV and specific on-resistance ( R _on, _sp) values higher than the unipolar limit (37 mOmegamiddotcm²), with a current gain of ten in the active region, were experimentally demonstrated. A novel selective growth of p-contact-based process was developed and implemented. This, coupled with improvements in the termination design, resulted in enhancing the blocking voltage capability to 6 kV while simultaneously lowering the R _on, _sp to below the unipolar limit (28 mOmegamiddotcm² and current gain of four in the active region), for the same starting material. Evidence for the presence of conductivity modulation (for the first time) in high-voltage SiC BJTs was also shown experimentally.
  IEEE Transactions on Electron Devices 01/2009; · 2.32 Impact Factor
• Conference Proceeding: 6kV 4H-SiC BJTs with Specific On-resistance Below the Unipolar Limit using a Selectively Grown Base Contact Process

  S. Balachandran, C. Li, P.A. Losee, I.B. Bhat, T.P. Chow
  [show abstract] [hide abstract]
  ABSTRACT: High-voltage (6 kV) 4H-SiC NPN BJTs are demonstrated using a novel self-aligned selectively grown base contact process. The devices exhibit specific on-resistance values (R_on,sp) as low as 28 mOmegacm², the lowest reported to date and below the unipolar limit. The current gain in the active region is found to be 3 and closely related to the depth of the isolation trench. The open-base turn-off curves exhibit a storage time of 0.4 mus, providing evidence for conductivity modulation in SiC high-voltage BJTs for the first time. Blanket growth devices fabricated on the same wafer as the selective growth devices show higher R_on,sp and current gain values as a result of a deeper isolation trench.
  Power Semiconductor Devices and IC's, 2007. ISPSD '07. 19th International Symposium on; 06/2007
• Conference Proceeding: lOkV 4H-SiC PiN Diodes Designed for Improved Switching Performance using Emitter Injection Control

  P.A. Losee, C. Li, Y. Wang, S.K. Sharma, T.P. Chow, I.B. Bhat, R.E. Stahlbush, R.J. Gutmann
  [show abstract] [hide abstract]
  ABSTRACT: The switching versus forward conduction performance tradeoffs of 10 kV 4H-SiC PiN diodes are optimized using emitter injection control. Experimental results show superior switching performance with up to a 40% reduction in critical recovery parameters such as Q_rr and J_RP, while simulations indicate a better performance tradeoff than conventional PiN diodes in the presence of sufficiently long drift layer lifetime.
  Power Semiconductor Devices and IC's, 2007. ISPSD '07. 19th International Symposium on; 06/2007
• Conference Proceeding: Degraded blocking performance of 4H-SiC rectifiers under high dV/dt conditions

  P.A. Losee, L Zhu, T.P. Chow, I.B. Bhat, R.J. Gutmann
  [show abstract] [hide abstract]
  ABSTRACT: We present our pulsed blocking measurements of co-fabricated 4H-SiC Schottky, junction barrier Schottky (JBS), and pin diodes. Schottky diodes fail at pulsed voltages noticeably lower than their static values, while the pulsed leakage currents of JBS and pin diodes (along with commercial SiC rectifiers) remain below our measurable limits until the reverse voltage approaches the static breakdown. From experimental results and numerical simulations, the premature breakdown of the diodes is attributed to the slow response of deep levels associated with dopant implantation, which can leave high field points such as the edge of contacts unprotected under high dV/dt blocking conditions.
  Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on; 06/2005
• Conference Proceeding: 1.5kV Novel 4H-SiC Lateral Channel (LC) JBS Rectifiers with Low Leakage Current and Capacitance

  Lin Zhu, Canhua Li, T.P. Chow, I.B. Bhat, K.A. Jones, C. Scozzie, A. Agarwal
  [show abstract] [hide abstract]
  ABSTRACT: We propose and experimentally demonstrate a novel 1.5kV JBS rectifier structure called LC-JBS rectifier that offers a lower reverse leakage current and faster switching speed. Test devices were fabricated using an epi regrowth technology over implanted p+ buried layer. We have obtained performance trade-offs between forward drop (<1.8V) with reverse leakage characteristics approaching that of PiN rectifiers, together with ~50% reduction of junction capacitance for LC-JBS rectifiers when compared to conventional Schottky rectifiers
  Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on; 06/2005
• Conference Proceeding: High-voltage 4H-SiC PiN rectifiers with single-implant, multi-zone JTE termination

  P.A. Losee, S.K. Balachandran, L. Zhu, C. Li, J. Seiler, T.P. Chow, I.B. Bhat, R.J. Gutmann
  [show abstract] [hide abstract]
  ABSTRACT: A novel multi-zone junction termination extension (MZJTE) is presented for high-voltage 4H-SiC pin junction rectifiers. Unlike the conventional multi-implantation or SiC etching approaches, our new termination technique utilizes multiple masking oxide etching steps to achieve a single-implant MZJTE structure that maintains surface planarity. Numerical device simulations have been performed to examine the process sensitivities, compared to single-zone JTE, and yielded breakdown voltages close to 90% of the ideal parallel-plane breakdown voltage. High voltage (V_BR≈8 kV) rectifiers were fabricated and experimental characteristics have been measured.
  Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on; 06/2004
• Source

  Available from: R.J. Gutmann

  Article: A simple single-step diffusion and emitter etching process for high-efficiency gallium-antimonide thermophotovoltaic devices

  G. Rajagopalan, N. S. Reddy, H. Ehsani, I. B. Bhat, P. S. Dutta, R. J. Gutmann, G. Nichols, O. Sulima
  [show abstract] [hide abstract]
  ABSTRACT: A single-step diffusion followed by precise etching of the diffused layer has been developed to obtain a diffusion profile appropriate for high-efficiency GaSb thermophotovoltaic (TPV) cells. The junction depth was controlled through monitoring of light current-voltage (I–V) curves (photovoltaic response) during the post-diffusion emitter-etching process. The measured photoresponses (prior to device fabrication) have been correlated with the quantum efficiencies (QEs) and the open-circuit voltages in the fabricated devices. An optimum junction depth for obtaining the highest QE and open-circuit voltage is presented based on diffusion lengths (or minority carrier lifetimes), carrier mobility, and the typical diffused impurity profile in GaSb.
  Journal of Electronic Materials 10/2003; 32(11):1317-1321. · 1.47 Impact Factor
• Article: GaSb and Ga1−xInxSb Thermophotovoltaic Cells using Diffused Junction Technology in Bulk Substrates

  P. S. Dutta, J. M. Borrego, H. Ehsani, G. Rajagopalan, I. B. Bhat, R. J. Gutmann, G. Nichols, P. F. Baldasaro
  [show abstract] [hide abstract]
  ABSTRACT: This paper presents results of experimental and theoretical research on antimonide‐ based thermophotovoltaic (TPV) materials and cells. The topics discussed include: growth of large diameter ternary GaInSb bulk crystals, substrate preparation, diffused junction processes, cell fabrication and characterization, and, cell modeling. Ternary GaInSb boules up to 2 inches in diameter have been grown using the vertical Bridgman technique with a novel self solute feeding technique. A single step diffusion process followed by precise etching of the diffused layer has been developed to obtain a diffusion profile appropriate for high efficiency, p‐n junction GaSb and GaInSb thermophotovoltaic cells. The optimum junction depth to obtain the highest quantum efficiency and open circuit voltage has been identified based on diffusion lengths (or minority carrier lifetimes), carrier mobility and experimental diffused impurity profiles. Theoretical assessment of the performance of ternary (GaInSb) and binary (GaSb) cells fabricated by Zn diffusion in bulk substrates has been performed using PC‐1D one‐dimensional computer simulations. Several factors affecting the cell performances such as the effects of emitter doping profile, emitter thickness and recombination mechanisms (Auger, radiative and Shockley‐Read‐Hall), the advantages of surface passivation and the impact of dark current due to the metallic grid will be discussed. The conditions needed for diffused junction cells on ternary and binary substrates to achieve similar performance to the epitaxially grown lattice‐ matched quaternary cells are identified. © 2003 American Institute of Physics
  AIP Conference Proceedings. 01/2003; 653(1):392-401.
• Article: Performance Limits of Low Bandgap Thermophotovoltaic Antimonide‐Based Cells for Low Temperature Radiators

  J. M. Borrego, C. A. Wang, P. S. Dutta, G. Rajagopalan, R. J. Gutmann, I. B. Bhat, H. Ehsani, J. F. Beausang, G. Nichols, P. F. Baldasaro
  [show abstract] [hide abstract]
  ABSTRACT: This paper assesses the performance of antimonide‐based thermophotovoltaic cells fabricated by different technologies. In particular, the paper compares the performance of lattice matched quaternary (GaInAsSb) cells epitaxially grown on GaSb substrates to the performance of ternary (GaInSb) and binary (GaSb) cells fabricated by Zn diffusion on bulk substrates. The focus of the paper is to delineate the key performance advantages of the highest performance‐to‐date of the quaternary cells to the performance of the alternative ternary and binary antimonide‐based diffusion technology. The performance characteristics of the cells considered are obtained from PC‐1D simulations using appropriate material parameters. © 2003 American Institute of Physics
  AIP Conference Proceedings. 01/2003; 653(1):498-507.
• Article: Antimonide-based devices for thermophotovoltaic applications

  C.W. Hitchcock, R.J. Gutmann, J.M. Borrego, I.B. Bhat, G.W. Charache
  [show abstract] [hide abstract]
  ABSTRACT: Thermophotovoltaic (TPV) devices have been fabricated using ternary and quaternary layers grown by metalorganic vapor phase epitaxy (MOVPE) on GaSb substrates. GaInSb ternary devices were grown with buffer layers to accommodate the lattice mismatch, and GaInAsSb quaternary devices were grown with lattice-matched compositions. Improved devices are obtained when optical absorption occurs in the p-layer due to the longer minority carrier diffusion length. Thick emitter p/n devices are limited by surface recombination, with highest quantum efficiency and lowest dark current being achieved with epitaxially grown surface passivation layers on lattice-matched MOVPE quaternaries. Thin emitter/thick base, n/p devices are very promising since surface passivation is less critical than for p-emitter devices
  IEEE Transactions on Electron Devices 11/1999; · 2.32 Impact Factor
• Article: Electrical characteristics of magnesium-doped gallium nitride junction diodes

  J. B. Fedison, T. P. Chow, H. Lu, I. B. Bhat
  [show abstract] [hide abstract]
  ABSTRACT: Electrical characteristics of lateral p⁺n diodes made from gallium nitride epitaxial layers on sapphire substrates are reported. The current–voltage characteristics are observed to have several distinct regions in which a tunneling current has been identified at low forward bias in addition to the conventional temperature-dependent diffusion current observed at moderate forward bias. A tunneling behavior indicates the presence of deep-level traps at the junction, which alter the electrical behavior of these junctions compared to the conventional behavior. In addition, space-charge-limited currents are found to influence these junctions at large forward and reverse bias. © 1998 American Institute of Physics.
  Applied Physics Letters 07/1998; · 3.84 Impact Factor
• Article: Surface passivation of GaAs MESFETs

  G.W. Charache, S. Akram, E.W. Maby, I.B. Bhat
  [show abstract] [hide abstract]
  ABSTRACT: The metal semiconductor field effect transistor (MESFET) represents a more realistic test for “passivation” efficacy than conventional capacitor test structures due to its prototypical fabrication process. This paper evaluates Gallium-Arsenide (GaAs) surface passivation films utilizing the MESFET as a test vehicle. For this study, gate-to-drain leakage current, gate-to-drain breakdown voltage, complex impedance versus frequency, and low-frequency noise measurements are performed on MESFETs with various passivation films. The results indicate that a hydrogen plasma used to “pre-clean” the GaAs surface in conjunction with an in situ plasma-enhanced chemical vapor deposition (PECVD) Si₃N₄ passivation film yields the best performance. In contrast, atomic-layer-epitaxial ZnSe demonstrated inferior performance (even in comparison to PECVD Si₃N₄ passivation films that did not receive a hydrogen “pre-clean”)
  IEEE Transactions on Electron Devices 12/1997; · 2.32 Impact Factor
• Conference Proceeding: TPV energy conversion: a review of material and cell related issues

  I.B. Bhat, J.M. Borrego, R.J. Gutmann, A.G. Ostrogorsky
  [show abstract] [hide abstract]
  ABSTRACT: This paper presents an overview of thermophotovoltaic (TPV) energy conversion using low band gap semiconductor photovoltaic cells. Physics of PN junctions related to TPV cells is described and the factors that affect overall cell efficiencies are outlined. Current status of bulk and epitaxial growth of TPV materials and cell fabrication issues are also described
  Energy Conversion Engineering Conference, 1996. IECEC 96. Proceedings of the 31st Intersociety; 09/1996
• Article: Investigation of the role of ZnSe films on GaAs using acoustoelectric voltage spectroscopy

  K. J. Han, A. Abbate, I. B. Bhat, S. Akram, P. Das
  [show abstract] [hide abstract]
  ABSTRACT: The electrical properties of the ZnSe/GaAs heterostructure have been investigated using the acoustoelectric voltage spectroscopy technique, and in particular, the role of the high‐resistivity ZnSe on the surface passivation of the GaAs substrate has been evaluated. From the transverse acoustoelectric voltage (TAV) spectra, the carrier type and concentration, energy band offsets, and the energy levels of various trap states at the heterostructure interface have been found. The effect of heterostructure epitaxial layer on the surface properties of GaAs has been studied by comparing the normalized changes in TAV amplitude for samples of various epitaxial layers and different thicknesses. From all these measurements, surface recombination velocities (S) have been evaluated. For the pseudomorphic ZnSe films (thickness ≤0.15 μm) on GaAs, a reduction in S has been found. As the thickness of the ZnSe film was increased, the presence of a large number of interface states due to the introduction of misfit dislocations was detected using TAV measurements.
  Journal of Applied Physics 08/1993; · 2.17 Impact Factor
• Article: Low temperature epitaxy of HgTe, CdTe, and HgCdTe using flow modulation techniques

  I. B. Bhat, H. Ehsani, W. S. Wang, S. K. Ghandhi, N. H. Karam
  [show abstract] [hide abstract]
  ABSTRACT: In this article, we report on the low temperature growth of HgTe, CdTe, and HgCdTe by flow modulation epitaxy (FME). Dimethylmercury, dimethylcadmium, and methylallyltelluride were used as the precursors in this ‘‘layer‐by‐layer’’ growth approach. Growth of CdTe at one monolayer per cycle was obtained at temperatures above 250 °C. The growth rate was invariant with temperature and reactant pressures. HgTe growth was carried out by FME at 140 °C at atmospheric pressure by precracking the Hg and Te alkyls at 350 °C. HgCdTe layers were grown by interdiffusing sequential layers of CdTe and HgTe.
  Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 08/1992; · 1.34 Impact Factor
• Conference Proceeding: Atomic Layer Epitaxy of CdTe on GaAs by Organometallic Vapor Phase Epitaxy

  W.S. Wang, H.E. Ehsani, I.B. Bhat
  [show abstract] [hide abstract]
  ABSTRACT: Not Available
  Metalorganic Vapor Phase Epitaxy, 1992. Sixth International Conference; 07/1992
• Conference Proceeding: Effect of GaAs Surface Stabilization on the Properties of ZnSe Grown by Organmetallic Vapor Phase Epitaxy

  S.A. Akram, H.E. Ehsani, I.B. Bhat
  [show abstract] [hide abstract]
  ABSTRACT: Not Available
  Metalorganic Vapor Phase Epitaxy, 1992. Sixth International Conference; 07/1992
• Article: N‐channel enhancement mode field‐effect transistors in Hg1-xCdxTe grown by organometallic epitaxy (direct alloy growth process)

  I. B. Bhat, K. K. Parat, H. Ehsani, S. K. Ghandhi
  [show abstract] [hide abstract]
  ABSTRACT: N‐channel metal‐insulator semiconductor field‐effect transistors were fabricated in Hg 1-x Cd x Te layers grown by the organometallic vapor phase epitaxy, using the direct alloy growth technique. As‐grown layers, which were p type due to Group II vacancies, were used as the starting material. Then n‐type source and drain regions were formed using a planar process for selective annealing of the Hg 1-x Cd x Te. The gate insulator consisted of 200 Å of native anodic sulfide followed by 2500 Å of thermally evaporated zinc sulfide. Indium was used as the gate metal. Details of device fabrication and characteristics are described here.
  Applied Physics Letters 10/1991; · 3.84 Impact Factor
• Article: Selective annealing for the planar processing of HgCdTe devices

  K. K. Parat, H. Ehsani, I. B. Bhat, S. K. Ghandhi
  [show abstract] [hide abstract]
  ABSTRACT: Hg 1-x Cd x Te layers grown by organometallic vapor phase epitaxy are p type with carrier concentrations around 4×10¹⁶ /cm³ due to group II vacancies. Following a Hg saturated anneal at 220 °C for 25 h, these layers become n type with carrier concentrations around 5×10¹⁴/ cm³ . However, the presence of a 0.5–0.8 μm thick CdTe cap inhibits the annealing of the underlying Hg 1-x Cd x Te layer, since it acts as a barrier for Hg diffusion. By opening windows in this cap, the underlying Hg 1-x Cd x Te layer can be annealed and converted to n type in a selective manner. P–N junction photodiodes were fabricated using this planar technique. Some of these diodes employed the CdTe cap itself as the surface passivant; in others, the CdTe cap was stripped and anodic sulfide was used as the junction passivant. In both the cases, diodes had R 0 A values comparable to the best values reported in literature. N‐channel enhancement mode metal–insulator semiconductor field effect transistors were also fabricated using anodic sulfide as the surface passivant. Here, the n‐type source and drain regions were formed by selectively annealing the as grown p‐type Hg 1-x Cd x Te layer.
  Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 06/1991; · 1.34 Impact Factor
• Article: Extrinsic p‐doped HgCdTe grown by direct alloy growth organometallic epitaxy

  N. R. Taskar, I. B. Bhat, K. K. Parat, S. K. Ghandhi, G. J. Scilla
  [show abstract] [hide abstract]
  ABSTRACT: This paper describes the doping behavior of arsenic in HgCdTe, grown by organometallic epitaxy using the direct alloy growth process. It is shown that arsenic readily incorporates into HgCdTe during this growth process, to a doping concentration of 1×10¹⁷ cm^-3. Secondary‐ion mass spectroscopy (SIMS) data clearly establishes the presence of arsenic in these layers. Moreover, excellent stability under annealing conditions (16 h at 270 °C followed by 10 h at 220 °C) indicates the suitability of arsenic as an extrinsic dopant source for HgCdTe. The net acceptor concentration is shown to be linearly proportional to the Hg overpressure. This fact, combined with mobility values which are comparable to those of bulk grown material, indicates that these layers are relatively uncompensated. High mobility values are preserved well into the saturated region of the acceptor concentration versus arsine flow rate characteristic. This is explained by the fact that the doping concentration is limited by surface coverage of the As species, and not by arsenic incorporation into compensating or inactive sites. Evidence for this process is presented by the SIMS data, which shows that the total arsenic concentration is linearly related to the net acceptor concentration over the entire doping range.
  Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 06/1991; · 1.34 Impact Factor