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20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India; 01/2007
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Karanth Shankaranarayana,
Soujanna Sarkar,
R. Venkatraman,
Shyam S. Jagini,
N. Venkatesh,
Jagdish C. Rao,
H. Udayakumar,
M. Sambandam,
K. P. Sheshadri,
S. Talapatra,
Parag Mhatre, Jais Abraham,
Rubin A. Parekhji
Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India; 01/2002
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ABSTRACT: The use of scan based compression techniques is becoming mandatory on current designs. While high compression is desired to hold the test costs within limits, it is important to understand the bounds set by the entropy of the care bits required by different compression techniques, to enable the selection of the right set of design and test parameters. This paper highlights the available solution space for compression based designs and discusses the various parameters which result in test tradeoffs. The discussion is supported with elaborate experimental data. Through them, the paper offers an insight into the solution space of compression techniques and makes resulting recommendations.
Proceedings of the Asian Test Symposium
