ABSTRACT: This paper presents the averaged state-space modeling and controller synthesis methodology for the cascaded H-bridge multilevel
active power filters (CHB-APFs). The accurate harmonic current compensation and dc-link stabilization among the individual
H-bridge modules are crucial problems for the CHB-APF, which is the prerequisite for the global stability of the system. In
this study, a novel voltage balancing algorithm is devised by splitting the dc-link control task into two parts, namely, the
average voltage control and the voltage balancing control, where the sine and cosine functions of the phase angle of the fundamental
grid voltage are used, respectively. To ensure accurate phase tracking, a novel phase-locked loop algorithm is proposed by
using the adaptive linear neural network (ADALINE). Moreover, a separate ADALINE identifier is applied for reference current
generation, and the proportional-resonant controller is used for current tracking. The simulation results obtained from the
Alternative Transient Program (ATP/EMTP) are provided under dynamic reactive power compensation and active filtering scenarios.
The experimental results from the prototype system are also presented, which verifies the effectiveness of the devised algorithms.
KeywordsState-space averaging (SSA)–Multilevel–Cascaded H-bridge (CHB)–Voltage balancing control (VBC)–Phase-locked loop (PLL)–ADALINE identifier
Electrical Engineering 04/2012; 93(2):63-81. · 0.40 Impact Factor
ABSTRACT: This paper proposes an effective control scheme for three-phase three-wire (3P3W) active power filter using neural-based harmonic
identification scheme. To achieve excellent steady state and dynamic response, the feedback control plus feed-forward control
structures is utilized in the proposed control algorithms. The steady-state error minimization is achieved by the feedback
loop, where the proportional integral regulators were adopted in d-axis and q-axis of the synchronous rotating reference frame synchronized with grid voltages by using the phase-locked loop. The adaptive
linear combiners are utilized in the feed-forward loop, which serves the purpose of load disturbance rejection, and it significantly
enhances dynamic performance of active power filter (APF). The modeling of the APF is based on the state-space modeling technique
and the decoupled state-space model in synchronous d–q frame is also presented. Moreover, the mathematical formulation of the neural harmonic identification scheme and the selection
of learning rate are discussed. It is found that the optimal learning rate is a compromise between the steady-state accuracy
and the requirement of dynamic response. To verify the theoretical analysis, extensive simulation results are presented under
both the balanced and unbalanced load conditions. The validity and effectiveness of the presented scheme is substantially
confirmed by the simulation and experimental results, and it can be easily extended to applications of single-phase and three-phase
Electrical Engineering 04/2012; 91(6):313-325. · 0.40 Impact Factor
Simulation Modelling Practice and Theory. 01/2009; 17:1299-1345.
ABSTRACT: This paper presents a new control scheme for dynamic voltage restorer (DVR), which consists of a set of series and shunt converters connected back-to-back (BTB), three series transformers, and a dc capacitor installed on the common dc-link. The DVR is characterized by installing the shunt converter on the source side and the series converter on the load side. A decoupled multiple reference frame phase-locked-loop (DMRFPLL) is proposed, which decouples signals of different frequencies and eliminates interactions between the fundamental-frequency positive-sequence components and harmonic and/or negative-sequence components in the grid voltages. The proposed DMRF-PLL scheme achieves a fast, precise, and robust positive-sequence voltage detection even under unbalanced and/or distorted grid voltages conditions. A detailed description and derivation of the detection method is presented. Besides, a separate proportional-integral (PI) controller is adopted to regulate the dc-link capacitor voltage. The load voltage waveform is restored to be sinusoidal with fundamental frequency by dynamically injecting compensating voltages to the series brunch of converters. The validity and effectiveness of the presented scheme has been confirmed by extensive simulation results obtained from a 380V/50kVA system using Matlab/Simulink.
WSEAS TRANSACTIONS on SYSTEMS. 8(2):261-277.