Allon Adir

Publications (10)0 Total impact

• Conference Proceeding: Threadmill: a post-silicon exerciser for multi-threaded processors.

  Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv
  Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011; 01/2011
• Conference Proceeding: A unified methodology for pre-silicon verification and post-silicon validation.

  Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann
  Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011; 01/2011
• Conference Proceeding: Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor.

  Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann
  Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011; 01/2011
• Source

  Available from: researchweb.watson.ibm.com

  Conference Proceeding: Reaching Coverage Closure in Post-silicon Validation.

  Allon Adir, Amir Nahir, Avi Ziv, Charles Meissner, John Schumann
  Hardware and Software: Verification and Testing - 6th International Haifa Verification Conference, HVC 2010, Haifa, Israel, October 4-7, 2010. Revised Selected Papers; 01/2010
• Source

  Available from: John M. Ludden

  Conference Proceeding: Advances in Simultaneous Multithreading Testcase Generation Methods.

  John M. Ludden, Michal Rimon, Bryan G. Hickerson, Allon Adir
  Hardware and Software: Verification and Testing - 6th International Haifa Verification Conference, HVC 2010, Haifa, Israel, October 4-7, 2010. Revised Selected Papers; 01/2010
• Source

  Available from: dac.com

  Conference Proceeding: A Framework for the Validation of Processor Architecture Compliance.

  Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled
  Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007; 01/2007
• Source

  Available from: uci.edu

  Conference Proceeding: A generic micro-architectural test plan approach for microprocessor verification.

  Allon Adir, Hezi Azatchi, Eyal Bin, Ofer Peled, Kirill Shoikhet
  Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005; 01/2005
• Source

  Available from: uci.edu

  Conference Proceeding: VLIW: a case study of parallelism verification.

  Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy
  Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005; 01/2005
• Article: Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification.

  Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv
  IEEE Design & Test of Computers. 01/2004; 21:84-93.
• Article: Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture.

  Allon Adir, Hagit Attiya, Gil Shurek
  IEEE Trans. Parallel Distrib. Syst. 01/2003; 14:502-515.