Yu-jie Dai

Publications (4)0.36 Total impact

• Article: Low power consumption high speed CMOS dual-modulus 15/16 prescaler for optical and wireless communications

  Hui-min Liu, Xiao-xing Zhang, Yu-jie Dai, Ying-jie Lv
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  ABSTRACT: Frequency synthesizer is an important part of optical and wireless communication system. Low power comsumption prescaler is one of the most critical unit of frequency synthesizer. For the frequency divider, it must be programmable for channel selection in multi-channel communication systems. A dual-modulus prescaler (DMP) is needed to provide variable division ratios. DMP is considered as a critical power dissipative block since it always operates at full speed. This paper introduces a high speed and low power complementary metal oxide semiconductor (CMOS) 15/16 DMP based on true single-phase-clock (TSPC) and transmission gates (TGs) cell. A conventional TSPC is optimized in terms of devices size, and it is resimulated. The TSPC is used in the synchronous and asynchronous counter. TGs are used in the control logic. The DMP circuit is implemented in 0.18 μm CMOS process. The simulation results are provided. The results show wide operating frequency range from 7.143 MHz to 4.76 GHz and it comsumes 3.625 mW under 1.8 V power supply voltage at 4.76 GHz.
  Optoelectronics Letters 05/2012; 7(5):341-345.
• Source

  Available from: zndxzk.com.cn

  Article: 1.0 V low voltage CMOS mixer based on voltage control load technique

  Bao-lin Wei, Yu-jie Dai, Xiao-xing Zhang, Ying-jie Lü
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  ABSTRACT: CMOS active mixer based on voltage control load technique which can operate at 1.0 V supply voltage was proposed, and its operation principle, noise and linearity analysis were also presented. Contrary to the conventional Gilbert-type mixer which is based on RF current-commutating, the load impedance in this proposed mixer is controlled by the LO signal, and it has only two stacked transistors at each branch which is suitable for low voltage applications. The mixer was designed and fabricated in 0.18 μm CMOS process for 2.4 GHz ISM band applications. With an input of 2.44 GHz RF signal and 2.442 GHz LO signal, the measurement specifications of the proposed mixer are: the conversion gain (G C) is 5.3 dB, the input-referred third-order intercept point (P IIP3) is 4.6 dBm, the input-referred 1 dB compression point (P 1dB) is −7.4 dBm, and the single-sideband noise figure (N FSSB) is 21.7 dB. Key wordsCMOS active mixer–voltage control load technique–low voltage
  Journal of Central South University of Technology 04/2012; 18(5):1572-1578. · 0.36 Impact Factor
• Conference Proceeding: A Sub 1V High-Gain Low-Noise CMOS Downconversion Folded Mixer for 2.4GHz ISM Band Applications

  Bao-lin Wei, Yu-jie Dai, Ying-jie Lu, Xiao-xing Zhang, Hui-min Liu
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  ABSTRACT: A high-gain low-noise CMOS downconversion active folded mixer which can operate at 900 mV supply voltage is presented in this paper, and a LC circuit is introduced between the common source node of the switching pair to resonate out the parasitic capacitance in order to improve the performance. The mixer is designed in chartered 0.18-mum one-poly six-metal CMOS technology for 2.4 GHz ISM band applications. With an input 2.44 GHz RF signal of -50 dBm driven by a 2.442 GHz LO signal of 0 dBm, simulation results show that the conversion gain is 18.6 dB, the input/output-referred third-order intercept point are -8.77/9.88 dBm respectively, and the single-sideband noise figure is 7.15 dB. The power consumption of the mixer is 5.2 mW.
  Intelligent Information Technology Application Workshops, 2008. IITAW '08. International Symposium on; 01/2009
• Conference Proceeding: An Oscillator Based on LDMOS Capacitor.

  Wei-hai Huang, Yu-jie Dai, Xiao-xing Zhang, Ying-jie Lu
  Sixth International Conference on Information Technology: New Generations, ITNG 2009, Las Vegas, Nevada, 27-29 April 2009; 01/2009