Yu-jie Dai

Nankai University, T’ien-ching-shih, Tianjin Shi, China

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Publications (6)1.29 Total impact

  • Bao-Lin Wei, Yu-Jie Dai
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    ABSTRACT: A CMOS active mixer based on variable load technique which can operate at 1.0 V supply voltage is proposed and its operation principle, noise and linearity analysis are presented. Different from the conventional Gilbert mixer based on RF current-commutating, the proposed mixer controls the load impedance according to the LO signal. It has only two stacked transistors at each branch which is suitable for low-voltage applications. The mixer was fabricated in 0.18-μm0.18-μm 1P6M CMOS process and measured in 2.4-GHz ISM band. With an input 2.440 GHz RF signal and a 2.442 GHz LO signal, the conversion gain is 5.3 dB, the input-referred third-order intercept points is 4.6 dBm, the input-referred 1 dB compression point is −7.4 dBm, and the single-sideband noise figure is 21.7 dB. Total DC current consumption is 3.5 mA.
    Microelectronics Journal 12/2012; 43(12):1003–1009. DOI:10.1016/j.mejo.2012.07.015 · 0.92 Impact Factor
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    ABSTRACT: CMOS active mixer based on voltage control load technique which can operate at 1.0 V supply voltage was proposed, and its operation principle, noise and linearity analysis were also presented. Contrary to the conventional Gilbert-type mixer which is based on RF current-commutating, the load impedance in this proposed mixer is controlled by the LO signal, and it has only two stacked transistors at each branch which is suitable for low voltage applications. The mixer was designed and fabricated in 0.18 μm CMOS process for 2.4 GHz ISM band applications. With an input of 2.44 GHz RF signal and 2.442 GHz LO signal, the measurement specifications of the proposed mixer are: the conversion gain (G C) is 5.3 dB, the input-referred third-order intercept point (P IIP3) is 4.6 dBm, the input-referred 1 dB compression point (P 1dB) is −7.4 dBm, and the single-sideband noise figure (N FSSB) is 21.7 dB. Key wordsCMOS active mixer–voltage control load technique–low voltage
    Journal of Central South University of Technology 10/2011; 18(5):1572-1578. DOI:10.1007/s11771-011-0874-4 · 0.36 Impact Factor
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    ABSTRACT: Frequency synthesizer is an important part of optical and wireless communication system. Low power comsumption prescaler is one of the most critical unit of frequency synthesizer. For the frequency divider, it must be programmable for channel selection in multi-channel communication systems. A dual-modulus prescaler (DMP) is needed to provide variable division ratios. DMP is considered as a critical power dissipative block since it always operates at full speed. This paper introduces a high speed and low power complementary metal oxide semiconductor (CMOS) 15/16 DMP based on true single-phase-clock (TSPC) and transmission gates (TGs) cell. A conventional TSPC is optimized in terms of devices size, and it is resimulated. The TSPC is used in the synchronous and asynchronous counter. TGs are used in the control logic. The DMP circuit is implemented in 0.18 μm CMOS process. The simulation results are provided. The results show wide operating frequency range from 7.143 MHz to 4.76 GHz and it comsumes 3.625 mW under 1.8 V power supply voltage at 4.76 GHz.
    Optoelectronics Letters 09/2011; 7(5):341-345. DOI:10.1007/s11801-011-0173-1
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    ABSTRACT: A high-gain low-noise CMOS downconversion active folded mixer which can operate at 900 mV supply voltage is presented in this paper, and a LC circuit is introduced between the common source node of the switching pair to resonate out the parasitic capacitance in order to improve the performance. The mixer is designed in chartered 0.18-mum one-poly six-metal CMOS technology for 2.4 GHz ISM band applications. With an input 2.44 GHz RF signal of -50 dBm driven by a 2.442 GHz LO signal of 0 dBm, simulation results show that the conversion gain is 18.6 dB, the input/output-referred third-order intercept point are -8.77/9.88 dBm respectively, and the single-sideband noise figure is 7.15 dB. The power consumption of the mixer is 5.2 mW.
    Intelligent Information Technology Application Workshops, 2008. IITAW '08. International Symposium on; 01/2009
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    ABSTRACT: The characteristic curve of the ordinary MOS capacitor is not monotonic, whereas the Laterally Diffused MOS (LDMOS) capacitor has a nearly ideal monotonic property. An oscillator based on LDMOS capacitor is designed and implemented using the standard 0.5 mum CMOS technology, and various essential factors have been considered, such as the layout size, the power consumption and the capacitance value, etc. The simulations and measurement results show that the oscillator has a small layout size, a low power consumption, a wide voltage range, and a high frequency accuracy.
    Sixth International Conference on Information Technology: New Generations, ITNG 2009, Las Vegas, Nevada, 27-29 April 2009; 01/2009
  • [Show abstract] [Hide abstract]
    ABSTRACT: A high-gain low-noise CMOS downconversion active folded mixer which can operate at 900mV supply voltageis presented in this paper, and a LC circuit is introduced between the common source node of the switching pair to resonate out the parasitic capacitance in order to improve the performance. The mixer is designed in chartered 0.18-mu m one-poly six-metal CMOS technology for 2.4GHz ISM band applications. With an input 2.44GHz RF signal of -50dBm driven by a 2.442GHz LO signal of 0dBm, simulation results show that the conversion gain is 18.6 dB, the input/output-referred third-order intercept point are -8.77/9.88dBm respectively, and the single-sideband noise figure is 7.15 dB. The power consumption of the mixer is 5.2mW.
    Proceedings of the 2008 International Symposium on Intelligent Information Technology Application Workshops - Volume 00; 12/2008