Yanghyo Kim

Publications (4)3.23 Total impact

• Source

  Available from: wvu.edu

  Article: An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling

  Gyung-Su Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, M.-C.F. Chang
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  ABSTRACT: A fully-integrated 8.4 Gb/s 2.5 pJ/b mobile memory I/O transceiver using simultaneous bidirectionaldual band signaling is presented. Incorporating both RF-band and baseband transceiver designs, this prototype demonstrates an energy-efficient and high-bandwidth solution for future mobile memory I/O interface. The proposed amplitude shift keying (ASK) modulator/demodulator with on-chip band-selective transformer obviates a power hungry pre-emphasis and equalization circuitry, revealing a low-power, compact and standard mobile memory-compatible solution. Designed and fabricated in 65-nm CMOS technology, each RF-band and baseband transceiver consumes 10.5 mW and 11 mW and occupies 0.08 mm² and 0.06 mm² die area, respectively. The dual-band transceiver achieves error-free operation (BER <; 10^-15 ) with 2²³- 1 PRBS at 8.4 Gb/s over a distance of 10 cm.
  IEEE Journal of Solid-State Circuits 02/2012; · 3.23 Impact Factor
• Article: An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling.

  Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Mau-Chung Frank Chang
  J. Solid-State Circuits. 01/2012; 47:117-130.
• Source

  Available from: ucla.edu

  Conference Proceeding: An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling

  Gyung-Su Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, H.-H. Hsieh, P.-Y. Wu, C. Jou, J. Cong, G. Reinman, M.-C.F. Chang
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  ABSTRACT: In summary, we have designed and fabricated a DBI for mobile DRAM I/O interface in 65nm CMOS to obtain an aggregate data throughput of 8.4Gb/s and 10Gb/s on FR4 and Roger test boards, respectively, with power consumptions of 21 mW and 25mW. The BERs for both test boards are measured as <;1x10^-15 by using 2²³-1 PRBS from the Agilent-70843C.
  Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International; 03/2011
• Conference Proceeding: An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling.

  Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, H.-H. Hsieh, P.-Y. Wu, Chewnpu Jou, Jason Cong, Glenn Reinman, Mau-Chung Frank Chang
  IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011; 01/2011