Y. Suzuki

NEC Corporation, Edo, Tōkyō, Japan

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Publications (26)25.91 Total impact

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    ABSTRACT: We developed 1.1-mum-range vertical-cavity surface-emitting lasers based on InGaAs-GaAs quantum wells, back-illuminated InGaAs photodiodes, and transimpedance amplifiers (InP heterojunction bipolar transistor) for high-speed optical interconnection. Clear eye opening operation and error-free transmission at 30 Gb/s over 100-m multimode fibers (GI32) were successfully achieved for the first time.
    IEEE Photonics Technology Letters 07/2008; · 2.04 Impact Factor
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    ABSTRACT: We have developed a 43-Gb/s differential receiver module for RZ-DPSK. A wide bandwidth of 42 GHz and a high transimpedance gain of 58 dBOmega were achieved.
    01/2008;
  • Y. Suzuki, M. Mamada, Z. Yamazaki
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    ABSTRACT: A 1:2 demultiplexer (DEMUX) IC based on InP HBT technology and operating over 100 Gb/s was developed. This IC provides high-speed operation with high signal quality and a wide timing margin by means of broadband impedance matching with double terminations and interconnection lines with a low phase constant in the data and clock distributions. It also obtains excellent eye openings with 550-mV<sub>p-p</sub> output voltage swings, less than 600-fs rms jitter, and error-free operation for 2<sup>31</sup> -1 at a data rate of 100 Gb/s. Moreover, mounted in a module, the DEMUX IC chip enables module operation at a data rate of 110 Gb/s. To the best of our knowledge, this is the highest data rate yet reported for DE-MUXs.
    IEEE Journal of Solid-State Circuits 12/2007; · 3.06 Impact Factor
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    ABSTRACT: We demonstrate 30-Gb/s transmission using 1.1 μm-range VCSELs based on InGaAs/GaAs quantum wells, back-illuminated InGaAs PDs, and TIAs (InP-HBT). Error-free 30-Gbps transmission with 100 m-MMFs (GI32) is achieved for the first time.
    Indium Phosphide & Related Materials, 2007. IPRM '07. IEEE 19th International Conference on; 06/2007
  • Y. Suzuki, Z. Yamazaki, H. Hida
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    ABSTRACT: A driver IC based on InP HBTs with a new circuit topology - called functional distributed circuit (FDC) - for over 40-Gb/s optical transmission systems has been developed. The FDC topology enables both wider bandwidth and digital functions. The distributed differential amplifier stage in the developed driver IC exhibits 2.4-V<sub>p-p</sub> output voltage swings (differential output: 4.8 V<sub>p-p</sub>) and good eye openings at 50 Gb/s. Integrated with a 2:1 selector, the driver IC produces 2.7-V<sub>p-p</sub> output voltage swings (differential output: 5.4 V<sub>p-p</sub>) with high signal quality at 80 Gb/s. This is equivalent to the highest data rate operation yet reported. These results indicate that the FDC has the potential to realize high-speed and functional ICs for over 40-Gb/s transmission systems.
    Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE; 07/2005
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    ABSTRACT: We implemented a low-voltage latch circuit topology in a full-rate 4:1 multiplexer (MUX) using InP-HBT technology. The proposed latch circuitry incorporates parallel current switching together with inductive peaking a combination that makes it suitable for over-40-Gb/s operation at supply voltages ranging from 1.5 to 1.8 V. The full-rate 4:1 MUX provided 40-Gb/s error-free operation with a power dissipation of only 1 W at a supply voltage of 1.8 V. The D-flip/flop (D-F/F) based on this latch circuitry provided 50-Gb/s D-F/F operation at a supply voltage as low as 1.5 V. Demultiplexing operation was also confirmed for the D-F/F with this circuit technology at a data rate of up to 110Gb/s with a 1.8-V supply voltage. The latch circuitry should help enable development of a low-voltage 40-Gb/s full-rate module which can be seamlessly connected with high-speed CMOS I/O circuits.
    IEEE Journal of Solid-State Circuits 01/2005; 40(10):2111-2117. · 3.06 Impact Factor
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    ABSTRACT: We implemented new circuit topology, a parallel-current-switching latch, in a full-rate 4:1 multiplexer using InP-HBT technology. This is the first report of this technology, which resulted in 40-Gb/s error-free operation with a power dissipation of only 1 W at a supply voltage of 1.8 V. This voltage is as low as that of high-speed CMOS I/O circuits. This circuit topology is capable of high-speed (>40 Gb/s) selector operation with a large clock phase margin (>200 deg) at a supply voltage as low as 1.3 V using bipolar-based devices that require a relatively large supply voltage. Demultiplexing operation was also confirmed for the D-F/F with this circuit technology at a data rate of up to 110 Gb/s with a 1.8-V supply voltage.
    Compound Semiconductor Integrated Circuit Symposium, 2004. IEEE; 11/2004
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    ABSTRACT: An extremely compact (0.3 cm<sup>3</sup>) 40 Gbit/s optical receiver module has been developed that integrates a waveguide pin-PD and an InGaP-HBT based transimpedance amplifier IC with an ease-of-use receptacle interface and a broadband feedthrough launcher. A wide bandwidth of 37 GHz and the highest ever sensitivity of -11 dBm at 43 Gbit/s have been successfully achieved.
    Electronics Letters 05/2004; · 1.04 Impact Factor
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    ABSTRACT: A 120Gb/s multiplexer and a 110Gb/s demultiplexer are implemented in an InP HBT process. They feature a direct drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted micro-strip lines. Their input sensitivity is less than 100mVpp, and the output swing is more than 400mVpp.
    Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International; 03/2004
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    ABSTRACT: InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mVpp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, an error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.
    IEEE Journal of Solid-State Circuits 01/2004; 39(12):2397-2402. · 3.06 Impact Factor
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    ABSTRACT: This paper reports the first low (1.5 V) supply voltage D-F/F able to run at a full rate of over 43 Gb/s. The proposed F/F circuitry incorporates parallel current switching together with inductive peaking, a combination that makes it suitable for over-43-Gb/s operation at a supply voltage as low as 1.5 V. The D-F/F, implemented through an InP-HBT process, provided 43 Gb/s error free operation with a large clock phase margin of 232 degrees. Moreover, the D-F/F produced a well-opened 50 Gb/s eye diagram. Power dissipation (P<sub>diss</sub>) of the D-F/F core circuit was reduced to 40 mW, which is less than one-tenth that of our conventional D-F/F. The F/F circuitry should help enable development of a low-P<sub>diss</sub> 43 Gb/s full-rate module with a 1.5 V range supply voltage, which can be seamlessly connected with high-speed CMOS I/O circuits.
    Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003. 25th Annual Technical Digest 2003. IEEE; 12/2003
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    ABSTRACT: An InGaP-HBT IC chipset for 40-Gbps optical-transmission systems was developed on the basis of a microwave-circuit design scheme techniques, circuit configurations, and concepts. A distributed amplifier achieved ≥50-GHz bandwidth and ≥164-GHz gain-bandwidth product, which are state-of-the-art values for GaAs-HBT-based baseband distributed amplifiers. A compact 40-GHz analog phase shifter with small insertion-loss variation, and 20-GHz/40-GHz clock amplifiers with very low power consumption (about 10 mW) were also realized. Moreover, a new approach - inserting impedance-transformer circuits - to enable 'impedance matching' in high-speed digital ICs was successfully applied to a 40-Gbps decision circuit to prevent unwanted gain peaking and jitter increase caused by transmission lines without sacrificing chip size.
    Microwave Conference, 2003. 33rd European; 11/2003
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    ABSTRACT: GaAs-based HBTs with an InGaP emitter were used to develop key components of a 40-Gb/s optical receiver: a transimpedance amplifier, a differential main amplifier, and a decision circuit. The frequency response of the transimpedance amplifier was flattened by inserting an RC series circuit at the input stage. As a result, the transimpedance amplifier module produced a well-opened 43-Gb/s eye diagram with 400 mVp-p dynamic range. The differential main amplifier and the decision circuit produced 43-Gb/s eye diagrams with a large dynamic range of 700 mVp-p, which is the first 40-Gb/s demonstration using GaAs-based HBTs. These three ICs are thus applicable to a 40-Gb/s optical receiver
    Microwave Symposium Digest, 2002 IEEE MTT-S International; 02/2002
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    ABSTRACT: A 40-Gb/s receiver module with an InAlAs waveguide avalanche photodiode has developed for the first time. We have achieved the minimum received power of -18 dBm, which is the highest sensitivity ever reported without fiber amplifiers
    Optical Communication, 2002. ECOC 2002. 28th European Conference on; 02/2002
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    ABSTRACT: We demonstrated Ku-band (12-20 GHz) Si MOSFET monolithic amplifiers with on-chip matching networks. In these amplifiers, we used 3-μm-thick Al-metal transmission lines on 8-μm-thick polyimide-SiON-SiO<sub>2</sub> isolation layers for the matching networks. The amplifier showed a gain of 6-10 dB and a noise figure (NF) of 3.5-4 dB up to about 20 GHz, the highest gain and lowest NF yet reported for MOSFET amplifiers at this frequency. We also clarified the lossy on-chip inductor effect on the gain and noise performance of the amplifiers
    IEEE Transactions on Microwave Theory and Techniques 07/2001; · 2.23 Impact Factor
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    ABSTRACT: We have developed an ultra high speed InAlAs-WG-APD with a 30-GHz bandwidth. We fabricated well defined small mesa APDs using dry-etching to reduce the capacitance of the APD. By combining this WG-APD and a GaAs-based preamplifier, we achieved a 30-GHz bandwidth APD receiver at M=2. This front end shows the possibility of applying the APDs to 40-Gb/s optical receivers for the first time.
    Optical Communication, 2001. ECOC '01. 27th European Conference on; 02/2001
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    ABSTRACT: A 500-mW monolithic-microwave integrated-circuit (MMIC) amplifier using a 0.6-μm Si MOSFET for 900-MHz-band use has been developed. The input matching network, which consists of a spiral inductor and an MOS capacitor, was integrated onto the chip using a low-cost mass-production large-scale-integration process. A new spiral-inductor model, taking into account the dielectric loss and skin effect of the Si substrate, was introduced. We analyzed the stability and gain dependence on the gate structure of the MOSFET and optimized the gate finger length and the loss of the matching network to achieve high gain and stability. The fabricated MMIC amplifier achieved a linear gain of 15.2 dB and an output power of 27.1 dBm with a PAE of 60% under a supply voltage of 4.8 V
    IEEE Transactions on Microwave Theory and Techniques 09/2000; · 2.23 Impact Factor
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    ABSTRACT: A preamplifier for 40-Gb/s optical transmission systems incorporating AlGaAs/InGaAs heterojunction bipolar transistors (HBTs) with p<sup>+</sup> regrown extrinsic base layers is described. The HBTs have a heavily doped regrown p<sup>+</sup>-GaAs layer in the extrinsic base regions and a thin graded InGaAs strained layer for the intrinsic base. Their measured peak f<sub>max</sub> is above 200 GHz. The developed preamplifier provides a bandwidth of 38.4 GHz and a transimpedance gain of 41.1 dB Ω. Moreover, the frequency response as an optical receiver has a bandwidth of 32 GHz. These characteristics make the preamplifier suitable for use in a 40-Gb/s optical receiver. These results show that AlGaAs/InGaAs HBTs with p<sup>+</sup> regrown extrinsic base layers are very promising for use in 40-Gb/s optical transmission systems
    IEEE Journal of Solid-State Circuits 03/1999; · 3.06 Impact Factor
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    ABSTRACT: We have demonstrated Ku-band (12-20 GHz) Si MOSFET monolithic amplifiers with on-chip matching networks. In these amplifiers, we used 3-μm-thick Al-metal transmission lines on 6-μm-thick polyimide/SiON isolation layers for the matching networks. The MOSFET amplifiers demonstrated a gain of 10 dB at about 23 GHz, the highest gain yet reported for this frequency. The bandwidth was as high as 25 GHz, which is close to f<sub>max</sub>/2 of the MOSFETs. Therefore, the on-chip matching networks could provide high performance up to the Ku-band
    Radio Frequency Integrated Circuits (RFIC) Symposium, 1999 IEEE; 02/1999
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    ABSTRACT: Ultra-low noise characteristics have been obtained in deep-sub-micron Si MOSFETs and Si MMICs by the new low-capacitance interconnect technique using polyimide inter-level dielectrics. The key issue is how to suppress the influence of interconnect parasitics due to the Si substrate. We have achieved 0.13 μm Si nMOS with NF<sub>min </sub> of 0.26 dB at 2 GHz and 6 GHz Si LNA with NF (50 Ω) of 2.2 dB and gain of 16.2 dB
    Electron Devices Meeting, 1999. IEDM Technical Digest. International; 02/1999