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ABSTRACT: A robust and efficient anomaly detection technique is proposed, capable of dealing with crowded scenes where traditional tracking based approaches tend to fail. Initial foreground segmentation of the input frames confines the analysis to foreground objects and effectively ignores irrelevant background dynamics. Input frames are split into non-overlapping cells, followed by extracting features based on motion, size and texture from each cell. Each feature type is independently analysed for the presence of an anomaly. Unlike most methods, a refined estimate of object motion is achieved by computing the optical flow of only the foreground pixels. The motion and size features are modelled by an approximated version of kernel density estimation, which is computationally efficient even for large training datasets. Texture features are modelled by an adaptively grown code-book, with the number of entries in the codebook selected in an online fashion. Experiments on the recently published UCSD Anomaly Detection dataset show that the proposed method obtains considerably better results than three recent approaches: MPPCA, social force, and mixture of dynamic textures (MDT). The proposed method is also several orders of magnitude faster than MDT, the next best performing method.
Computer Vision and Pattern Recognition Workshops (CVPRW), 2011 IEEE Computer Society Conference on; 07/2011
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A.T. Krishnan,
F. Cano,
C. Chancellor, V. Reddy,
Zhangfen Qi,
P. Jain,
J. Carulli,
J. Masin,
S. Zuhoski,
S. Krishnan,
J. Ondrusek
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ABSTRACT: Circuits employing advanced performance and power management techniques (clock gating, half-cycle paths) are found to be much more sensitive to NBTI primarily due to differential and asymmetric aging, with a 1% transistor drift leading to as much as 3% circuit drift in some cases. For the first time, we report a monotonic reduction in variance of the log parameters (Ln(ΔF/F) and Ln(ΔI<sub>D</sub>/I<sub>D</sub>)) as a function of stress time. A stochastic guard banding model accounting for time-dependent variance, re-ordering effects and granularity of data is demonstrated.
Electron Devices Meeting (IEDM), 2010 IEEE International; 01/2011
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ABSTRACT: A feasible computational framework that enables improved predictability of NBTI degradation within commercially available tools is discussed. The NBTI model is used for both delay correction in transistor characterization data and real-time circuit operation where recovery is present. The complementary nature of implementation is readily incorporated into existing model extraction and verification tools. The method provides significantly enhanced accuracy in simulations when compared to circuit data, yet retains practicality and flexibility.
Reliability Physics Symposium (IRPS), 2010 IEEE International; 06/2010
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ABSTRACT: We consider wireless networks in which multiple paths are available between each source and destination. We allow each source to split traffic among all of its available paths, and ask the question: how do we attain the lowest possible number of transmissions per unit time to support a given traffic matrix? Traffic bound in opposite directions over two wireless hops can utilize the "reverse carpooling'' advantage of network coding in order to decrease the number of transmissions used. We call such coded hops as "hyper-links''. With the reverse carpooling technique longer paths might be cheaper than shorter ones. However, there is a prisoners dilemma type situation among sources - the network coding advantage is realized only if there is traffic in both directions of a shared path. We develop a two-level distributed control scheme that decouples user choices from each other by declaring a hyper-link capacity, allowing sources to split their traffic selfishly in a distributed fashion, and then changing the hyper-link capacity based on user actions. We show that such a controller is stable, and verify our analytical insights by simulation.
INFOCOM, 2010 Proceedings IEEE; 04/2010
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ABSTRACT: Many computer vision algorithms such as object tracking and event detection assume that a background model of the scene under analysis is known. However, in many practical circumstances it is unavailable and must be estimated from cluttered image sequences. We propose a sequential technique for background estimation in such conditions, with low computational and memory requirements. The first stage is somewhat similar to that of the recently proposed agglomerative clustering background estimation method, where image sequences are analysed on a patch by patch basis. For each patch location a representative set is maintained which contains distinct patches obtained along its temporal line. The novelties lie in iteratively filling in background areas by selecting the most appropriate candidate patches according to the combined frequency responses of extended versions of the candidate patch and its neigh-bourhood. It is assumed that the most appropriate patch results in the smoothest response, indirectly enforcing the spatial continuity of structures within a scene. Experiments on real-life surveillance videos demonstrate the efficacy of the proposed method.
Image Processing (ICIP), 2009 16th IEEE International Conference on; 12/2009
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ABSTRACT: Low-power circuit operations, such as dynamic voltage scaling and the sleep mode, pose a unique challenge to aging prediction. Traditional aging models assume constant voltage and averaged activity factor, ignoring the impact of the long sleep period, and thus, result in a significant overestimation of the degradation rate. To accurately predict the aging effect in low-power design, this work first examines critical model assumptions in the reaction-diffusion process that is responsible for the NBTI effect. By using the correct diffusion profile, it then proposes a new aging model that effectively analyzes the degradation under various low-power operations. The new model well predicts the aging behavior of scaled CMOS measurement data (45 nm and 65 nm) with different operation patterns, especially sleep mode operation and dynamic voltage scaling. Compared to previous aging models, the new result captures the essential role of the long recovery phase in circuit aging, reducing unnecessary guardbanding in reliability protection.
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE; 10/2009
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ABSTRACT: Segmentation of foreground objects of interest from an image sequence is an important task in most smart cameras. Background subtraction is a popular and efficient technique used for segmentation. The method assumes that a background model of the scene under analysis is known. However, in many practical circumstances it is unavailable and needs to be estimated from cluttered image sequences. With embedded systems as the target platform, in this paper we propose a sequential technique for background estimation in such conditions, with low computational and memory requirements. The first stage is somewhat similar to that of the recently proposed agglomerative clustering background estimation method, where image sequences are analysed on a block by block basis. For each block location a representative set is maintained which contains distinct blocks obtained along its temporal line. The novelties lie in iteratively filling in background areas by selecting the most appropriate candidate blocks according to the combined frequency responses of extended versions of the candidate block and its neighbourhood. It is assumed that the most appropriate block results in the smoothest response, indirectly enforcing the spatial continuity of structures within a scene. Experiments on real-life surveillance videos demonstrate the advantages of the proposed method.
Distributed Smart Cameras, 2009. ICDSC 2009. Third ACM/IEEE International Conference on; 10/2009
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ABSTRACT: Rail is a significant capital asset for railway companies. It contributes more than half of the capital assets of railway infrastructure. Recent rail inspection data using Ultrasonic rail testing has shown increasing number of rail defects, failures and causing disruptions to rail services. This cost can be further increased when the track quality is poor. In recent years, railroads have been purchasing over 500,000 tons of rails per year at an estimated total cost of US $1.25 billion for replacement of worn out and degraded rails. Rail grinding is considered as viable means in reducing the impacts of rail defects and failures. Rail grinding can result in improved curving performance (wheel/rail interaction) and prevents crack initiation and propagation of surface cracks due to RCF. This paper focuses on analysis of rail degradation process and development of mathematical model considering technical and economic decisions in rail grinding to rail infrastructure owners.
Industrial Engineering and Engineering Management, 2008. IEEM 2008. IEEE International Conference on; 01/2009
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E. Beck,
W. Kirkwood,
D. Caress,
T. Berk,
P. Mahacek,
K. Brashem,
J. Acain, V. Reddy,
C. Kitts,
J. Skutnik,
G. Wheat
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ABSTRACT: Students with Santa Clara University (SCU) and the Monterey Bay Aquarium Research Institute (MBARI) are developing an innovative platform for shallow water bathymetry. Bathymetry data is used to analyze the geography, ecosystem, and health of marine habitats. However, current methods for shallow water measurements typically involve large, manned vessels. These vessels may pose a danger to themselves and the environment in shallow, semi-navigable waters. Small vessels, however, are prone to disturbance by the waves, tides, and currents of shallow water. The SCU / MBARI autonomous surface vessel (ASV) is designed to operate safely, stably in waters > 1 m and without significant manned support. Final deployment will be at NOAA's Kasitsna Bay Laboratory in Alaska. The ASV utilizes several key design components to provide stability, shallow draft, and long-duration unmanned operations. Bathymetry is measured with a multibeam sonar in concert with DVL and GPS sensors. Pitch, roll, and heave are minimized by a Small Waterplane Area Twin Hull (SWATH) design. The SWATH has a submerged hull, small water-plane area, and high mass to damping ratio, making it less prone to disturbance and ideal for accurate data collection. Precision sensing and actuation is controlled by onboard autonomous algorithms. Autonomous navigation increases the quality of the data collection and reduces the necessity for continuous manning. The vessel has been operated successfully in several open water test environments, including Elkhorn Slough, CA, Steven's Creek, CA, and Lake Tahoe, NV. It is currently is in the final stages of integration and test for its first major science mission at Orcas Island, San Juan Islands, WA, in August, 2008. The Orcas Island deployment will feature design upgrades implemented in Summer, 2008, including additional batteries for all-day power (minimum eight hours), active ballast, real-time data monitoring, updated autonomous control electronics and software, and data-
editing using in-house bathymetry mapping software, MB-System. This paper will present the results of the Orcas Island mission and evaluate possible design changes for Alaska. Also, we will include a discussion of our shallow water bathymetry design considerations and a technical overview of the subsystems and previous test results. The ASV has been developed in partnership with Santa Clara University, the Monterey Bay Aquarium Research Institute, the University of Alaska Fairbanks, and NOAA's West Coat and Polar Regions Undersea Research Center.
Autonomous Underwater Vehicles, 2008. AUV 2008. IEEE/OES; 11/2008
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ABSTRACT: Accurate prediction of circuit aging and its variability is essential to reliable design and analysis. Such a capability further helps reduce the load in statistical reliability test. Based on compact models of transistor degradation and circuit performance, we develop analytical solutions that efficiently predict the statistics of both circuit timing and the leakage under temporal stress and process variations. These solutions prove that circuit aging and its variance can be fully predicted from the characteristics of transistor degradation and circuit performance sensitivity to aged parameters, independent on the type and the amount of process variations. Specific results include: (1) under variations, the standard deviation of circuit speed declines with the stress time, following a power law of 1/6; and (2) the logarithmic mean and the standard deviation of leakage current decrease with the stress time as t<sup>1/6</sup>. The results are systematically validated by simulation and measurement data from an industrial 65 nm technology, enhancing the predictability and efficiency of statistical reliability analysis.
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE; 10/2008
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ABSTRACT: Image guidance facilitates catheter-based ablation of atrial fibrillation. Preprocedural magnetic resonance (MR) or computed tomographic (CT) imaging of the left atrium (LA) and pulmonary veins (PV) has been used to derive essential information about cardiac anatomy, however, significant changes in morphology can occur between preprocedural imaging and the actual intervention. The two procedures can be separated in time by days or even weeks, during which changes in volume status and other physiological factors can occur. We present and validate an intraprocedural imaging method based on contrast-enhanced 3D rotational X-ray angiography (3DRA) which allows for near-real-time 3D characterization of LA/PV anatomy with good accuracy and reproducibility.
Computers in Cardiology, 2007; 11/2007
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A.T. Krishnan, V. Reddy,
D. Aldrich,
J. Raval,
K. Christensen,
J. Rosal,
C. O'Brien,
R. Khamankar,
A. Marshall,
W.-K. Loh,
R. McKee,
S. Krishnan
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ABSTRACT: The SRAM cell sensitivity to transistor degradation is understood using a novel test methodology. A new, semi-empirical model that captures the observed trends is derived. The key findings include (a) cell sensitivity to NBTI degradation is high when low NMOS V<sub>T</sub>/ high PMOS V<sub>T</sub> combination arises (b) NBTI contribution to product V<sub>MIN</sub> drift arises mainly from the mean V<sub>TP</sub> shift which moves the overall distribution, and (c) NBTI-induced variance is overwhelmed by the time-zero variation of the six transistors of the SRAM. These findings enable a quantitative prediction that the NBTI-induced V<sub>MIN</sub> increase during burn-in is of the order of the NBTI-induced V<sub>T</sub> shift
Electron Devices Meeting, 2006. IEDM '06. International; 01/2007
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Microelectronics Reliability. 01/2007; 47:863-872.
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ABSTRACT: Negative bias temperature instability (NBTI) is known to exhibit significant recovery upon removal of the gate voltage. The process dependence of this recovery behavior is studied by using the time slope (n) as the monitor. We observe a systematic variation of n with oxide thickness, nitrogen concentration, and fluorine implantation. Incorporation of the material dependence of the diffusivity within the reaction-diffusion (R-D) framework captures the observed trends. The consequences of this modification are (a) diffusion limitation is shown to arise from diffusion in poly-Si, rather than oxide, (b) a plausible explanation for low-voltage stress induced leakage current (LV-SILC) naturally appears. Important findings are (a) NBTI degradation remains significant at high frequencies, (b) numerical simulations at moderate frequencies can be used to predict circuit impact in the GHz regime, (c) high frequency operation can be modeled as a lower effective DC stress
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International; 01/2006
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ABSTRACT: A quantitative model is developed for the first time, that comprehends all the unique characteristics of NBTI degradation. Several models are critically examined to develop a reaction/diffusion based modeling framework for predicting interface state generation during NBTI stress. NBTI degradation is found to be dominated by diffusion of neutral atomic and molecular hydrogen related defects. Additionally, the presence of hydrogen gettering sites such as unsaturated grain bound- aries significantly enhance NBTI degradation, whereas hydrogen sources reduce NBTI degradation. The model also suggests the possible mechanisms for saturation. The model is calibrated over a range of stress temperatures and voltages. The model captures recovery, experimental delay and frequency effects successfully.
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International; 05/2004
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ABSTRACT: We describe a quantitative relationship between I<sub>D</sub> and V<sub>T</sub> driven NBTI specifications. Mobility degradation is shown to be a significant (∼40%) contributor to I<sub>D</sub> degradation. We report for the first time, degradation in gate-drain capacitance (C<sub>GD</sub>) due to NBTI. The impact of this C<sub>GD</sub> degradation on circuit performance is quantified for both digital and analog circuits. We find that C<sub>GD</sub> degradation has a greater impact on the analog circuit studied than the digital circuit. We demonstrate that there is an optimum operating voltage that balances NBTI degradation against transistor voltage headroom. Further, a numerical model based on the reaction-diffusion theory has been developed, which is found to satisfactorily describe degradation, recovery and post-recovery response to stress.
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International; 01/2004
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ABSTRACT: We have examined the impact of NBTI degradation on digital circuits through the stressing of ring oscillator circuits. By subjecting the circuit to pMOS NBTI stress, we have unambiguously determined the circuit reliability impact of NBTI. We demonstrate that the relative frequency degradation of the NBTI stressed ring oscillator increases as the voltage at operation decreases. This behavior can be explained by reduced transistor gate overdrive and reduced voltage headroom at the circuit level. We present evidence that donor interface state generation during NBTI stress is a significant component of the transistor degradation. Furthermore, we show that the Static Noise Margin of a SRAM memory cell is degraded by NBTI and the relative degradation increases as the operating voltage decreases.
Reliability Physics Symposium Proceedings, 2002. 40th Annual; 02/2002
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ABSTRACT: This paper introduces a depth-computation architecture designed
for, but not limited to, a single-chip current mode analog VLSI (aVLSI)
implementation of stereo vision. The architecture implements a modified
version of the block matching algorithm; pixel blocks are averaged
(summed) vertically before comparison along the horizontal axis. This
both reduces the effects of noise and provides an order-of-magnitude
reduction in computational complexity. Simulation results indicate
performance on par with a full implementation of block matching
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on; 02/2002
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ABSTRACT: The impact of charging damage from plasma processes on negative
bias temperature instability (NBTI) is demonstrated. The NBTI lifetime
of an antenna device decreases more than 5× over intrinsic NBTI
lifetime and is seen across devices with different thicknesses of the
gate dielectric, as well as different back-end processes (Al or Cu).
Charging damage (in antenna devices) during processing creates interface
states, which are passivated during sinter, resulting in excess Si-H
bonds in antenna devices. The increased degradation of devices with an
antenna is attributed to these excess Si-H bonds, which are weak and
break during the negative bias temperature stress
Electron Devices Meeting, 2001. IEDM Technical Digest. International; 02/2001
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ABSTRACT: CMOS reliability is facing unprecedented challenges due to the continued scaling of device dimensions. To sustain the current scaling trends, it is imperative to understand the fundamental physics of failure mechanisms. Due to the inherent complexity of these mechanisms, some of the key failure mechanisms can be understood only by a numerical modeling approach. Most failure mechanisms have a characteristic time dependence to failure. Hence in this work, we use a numerical approach to investigate the time dependence of failure mechanism associated with interfacial kinetics at the Si/SiO2 interface. Several models are critically examined to develop a reaction/diffusion based modeling framework for predicting interface state generation. Our modeling shows reactions at the Si/SiO2 interface have a direct impact on the time dependence (or time slopes). These time kinetics predictions shed light on the underlying mechanisms behind an technologically important failure mechanism (negative bias temperature instability (NBTI)). In particular, the breaking of an interface SiH bond to release atomic H results in a time slope of 0.25, whereas the release of molecular H2 results in a time slope of 0.165. Based on this model, we conclude NBTI degradation is dominated by diffusion of neutral molecular hydrogen defects. These models are extended to 2D simulations to study device layout effects. Our simulations suggest differences with device structure (Lgate, Width etc.) and agree with observed experimental results. The developed models are further applied to understand operation under dynamic and static stress.
Microelectronics Reliability.
