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Publications (41)54.67 Total impact

  • R. E. Fontana · G. M. Decad · S. R. Hetzler
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    ABSTRACT: Memory storage components, i.e., hard disk drives, tape cartridges, solid state drives using Flash NAND chips, and now optical cartridges using Blu-ray disks, have provided annual increases in memory capacity by decreasing the area of the memory cell associated with the technology of these components. The ability to reduce bit cell sizes is now being limited by nano-technology physics so that in order for component manufacturers to continue to increase component capacity, volumetric enhancements to the storage component are now being introduced. Volumetric enhancements include adding more tape per cartridge, more disk platters per drive, and more layers of memory cells on the silicon NAND substrate or on the optical disk substrate. This paper describes these volumetric strategies, projects density trends at the bit cell level, and projects volumetric trends at the component level in order to forecast future component capacity trends.
    Journal of Applied Physics 04/2015; 117(17). DOI:10.1063/1.4906208 · 2.18 Impact Factor
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    ABSTRACT: Successful implementation of on-chip power conversion using ferromagnetic inductors requires both high power efficiency and high power density. The theoretical limits to power density and efficiency possible with thin film ferromagnetic inductors in a buck converter topology with and without coupling are explored. Power density can be related to energy density of the inductor, while efficiency can be related to Q and the DC resistance loss of the inductor. To achieve 100 A/cm2 for a 100 MHz 2:1 V converter with a 90% inductor efficiency, a peak Q of more than 8 is required with an energy storage of more than 5 nJ/mm2. Using coupling, the power density can be further increased, but is ultimately limited by DC resistance loss in the coils. Figures of merit (FOM) for comparing inductors of various designs are also discussed.
    IEEE Transactions on Magnetics 07/2013; 49(7):4137-4143. DOI:10.1109/TMAG.2013.2240442 · 1.39 Impact Factor
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    ABSTRACT: Thin-film ferromagnetic inductors show great potential as the energy storage element for integrated circuits containing on-chip power management. In order to achieve the high energy storage required for power management, on-chip inductors require relatively thick magnetic yoke materials (>= a micron). The first part of this paper includes a review of on-chip inductors with magnetic materials from earlier studies. The second part describes the fabrication and characterization of a magnetic inductor on a silicon interposer at IBM. These inductors contained a variety of yoke geometries, included single-turn and multi-turn coils, and were fabricated on 200mm silicon wafers in a CMOS back-end-of-line (BEOL) facility. Each inductor consisted of electroplated copper coils enclosed by electroplated Ni45Fe55 yokes. Aspects of the fabrication of the inductors are described, along with the magnetic properties of the electroplated yoke material and inductor performance.
    ECS Transactions 03/2013; 50(10):93-105. DOI:10.1149/05010.0093ecst
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    ABSTRACT: Linear tape recording heads, introduced in 1984, originally were cylindrical ferrite structures having shunt-biased magnetoresistive sensors. In 2000, heads transitioned to flat-lapped, ceramic wafers and anisotropic magnetoresistive (AMR) sensors fabricated in hard disk drive (HDD) facilities. In 2008, heads transitioned to giant magnetoresistive (GMR) sensors. Engineering tape heads has meant dealing with problems related to the head-media interface. Examples include sub-nanosecond pulses in sensors having metal shields (ca. 1994), signal losses and telegraph noise caused by parasitic electrical connections and spacing due to deposits that form at low relative humidity. Wear management, especially with 'green' media, and stick-slip effects are on-going challenges. A strategy was created for protecting GMR tape heads, leading to the discovery of polycrystalline Al2O3 films.
    ECS Transactions 03/2013; 50(10):19-33. DOI:10.1149/05010.0019ecst
  • R.E. Fontana · G.M. Decad · S.R. Hetzler
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    ABSTRACT: Increases in annual petabyte (PB) shipments for storage class memories (SCM) are driven by both increases in areal density and increases in manufacturing capacity. Increases in areal density tend to reduce cost per bit while increases in manufacturing capacity are cost neutral or slightly increase cost per bit. This paper surveys the last five years of PB shipments, areal density, revenue, and cost per bit for magnetic tape (TAPE), hard disk drives (HDD), and NAND flash to study manufacturing and cost trends for storage class memories. First, using the five year data for PB shipments and areal density values for TAPE, HDD and NAND flash, this paper applies a manufacturing measure used by semiconductors, millions of square inches or MSI of produced memory, to TAPE, HDD, and NAND flash in order to compare manufacturing requirements for these three SCM technologies. The MSI calculations shows for HDD and NAND, with slowing areal density increases, that manufacturing investments will be required for sustaining PB shipment growth while for TAPE modest investment in manufacturing capacity is required. The MSI calculations also show that the cost of NAND replacing HDD is prohibitive based simply on present day manufacturing capacity and show that for HDD to adopt processing requirements for patterned media, the next proposed areal density improvement for HDD, would require significant manufacturing investments. Second, using the five year data for PB shipments and revenue for TAPE, HDD, and NAND flash, trends in cost per bit for the SCM technologies can be determined and related to both technology innovations, i.e. lithography for NAND flash and predictable areal density increases for TAPE, and to external market factors, i.e. industry consolidation for HDD and mobile computing for NAND flash. Lastly, while 2012 PB shipments for TAPE, HDD, and NAND flash totaled 430,000 PB, dominated by HDD with 380,000 PB, perceived information creation in 2012 was over 1,300,000 PB, pos- ng the question to SCM manufacturers as to how information is stored in today's environment.
    Mass Storage Systems and Technologies (MSST), 2013 IEEE 29th Symposium on; 01/2013
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    ABSTRACT: Saturation in thin film coupled magnetic inductors was measured as a function of dc current in both windings. A simple mathematical model was created to approximate the inductor saturation level in the presence of the two currents. The model was compared both to FEM calculations of saturation in a linear model and to the experimental findings. Using the mathematical model, an expression for the maximum dc current and maximum flux levels in the yokes was derived for a two phase coupled buck converter, as a function of coupling.
    IEEE Transactions on Magnetics 11/2012; 48(11):4119-4122. DOI:10.1109/TMAG.2012.2201140 · 1.39 Impact Factor
  • Robert E. Fontana · Steven R. Hetzler · Gary Decad
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    ABSTRACT: This paper describes the roadmap goals for tape based magnetic recording (TAPE) and uses these goals as counterpoints for the roadmap strategies for hard disk drive (HDD) and NAND flash. Technology comparisons described in this paper will show that presently volumetric efficiencies for TAPE, HDD, and NAND are similar, that lithographic requirements for TAPE are less challenging than those for NAND and HDD, and that mechanical challenges (moving media and transducer to media separation) for TAPE and HDD are potential limiters for roadmap progress and are non-existent for NAND. One result of the technology comparison discussion will be that the potential for sustained annual areal density increase rates, i.e. extendibility, for TAPE, is significantly greater than that for NAND and HDD due to the present TAPE bit cell area being a factor of 200–300 larger than the NAND and HDD bit cell area. More critically, the roadmap landscape for TAPE is limited by neither thin film processing (i.e., nanoscale dimensions) nor bit cell thermal stability. In contrast, NAND volumetric density faces limitations in extending critical feature processing, now at 25 nm, and HDD volumetric density faces challenges in transitioning either to patterned media with critical feature processing well below 15 nm or to heat assisted magnetic recording (HAMR) with the introduction of laser components to the data write process.
    IEEE Transactions on Magnetics 05/2012; 48(5):1692-1696. DOI:10.1109/TMAG.2011.2171675 · 1.39 Impact Factor
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    ABSTRACT: Thin-film ferromagnetic inductors show great potential as the energy storage element for integrated circuits containing on-chip power management. In order to achieve the high energy storage required for power management, on-chip inductors require relatively thick magnetic yoke materials (several microns or more), which can be readily deposited by electroplating through a photoresist mask as demonstrated in this paper, the yoke material of choice being Ni45Fe55, whose properties of relatively high moment and electrical resistivity make it an attractive model yoke material for inductors. Inductors were designed with a variety of yoke geometries, and included both single-turn and multi-turn coil designs, which were fabricated on 200 mm silicon wafers in a CMOS back-end-of-line (BEOL) facility. Each inductor consisted of electroplated copper coils enclosed by the electroplated Ni45Fe55 yokes; aspects of the fabrication of the inductors are discussed. Magnetic properties of the electroplated yoke materials are described, including high frequency permeability measurements. The inductance of 2-turn coil inductors, for example, was enhanced up to about 6 times over the air core equivalent, with an inductance density of 130 nH/mm2 being achieved. The resistance of these non-laminated inductors was relatively large at high frequency due to magnetic and eddy current losses but is expected to improve as the yoke material/structure is further optimized, making electroplated yoke-containing inductors attractive for dc-dc power converters.
    Journal of Applied Physics 03/2012; 111(7). DOI:10.1063/1.3679458 · 2.18 Impact Factor
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    ABSTRACT: Energy consumption is a dominant constraint on the performance of modern microprocessors and systems-on-chip. Dynamic voltage and frequency scaling (DVFS) is a promising technique for performing “on-the-fly” energy-performance optimization in the presence of workload variability. Effective implementation of DVFS requires voltage regulators that can provide many independent power supplies and can transition power supply levels on nanosecond timescales, which is not possible with modern board-level voltage regulator modules (VRMs) [1]. Switched-inductor integrated voltage regulators (IVRs) can enable effective implementation of DVFS, eliminating the need for separate VRMs and reducing power distribution network (PDN) impedance requirements by performing dc-dc conversion close to the load while supporting high peak current densities [2–3]. The primary obstacle facing development of IVRs is integration of suitable power inductors. This work presents an early prototype switched-inductor IVR using 2.5D chip stacking for inductor integration.
    IEEE Journal of Solid-State Circuits 01/2012; 48(1):400-402. DOI:10.1109/ISSCC.2012.6177064 · 3.01 Impact Factor
  • R.E. Fontana · Neil Robertson · S.R. Hetzler
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    ABSTRACT: Magnetic recording has maintained a cost/bit advantage over solid-state storage by using a single transducer to self-assemble bits with sub-lithographic dimensions on an unpatterned substrate. This paper explores the ability of magnetic recording to maintain this advantage at 1 Tbit/in<sup>2</sup> by examining the process challenges associated with the fabrication of head structures at this areal density. Specifically, this paper describes the minimum feature, F, and alignment requirements for the thin-film head structures supporting 1 Tbit/in<sup>2</sup> densities and compares these requirements with the projected roadmaps of the semiconductor industry. These comparisons indicate that minimum feature head processing requirements will match semiconductor capabilities in the time frame for 1 Tbit/in<sup>2</sup> recording product. Further, alignment requirements for the head structure will exceed projected semiconductor capabilities in this same time frame. The process implications of the technologies of discrete tracks and patterned bits are analyzed, which move the minimum feature requirements from the head structure to the disk media. These approaches require patterning sub-lithographic bit cell dimensions which by definition exceed semiconductor lithographic capabilities.
    IEEE Transactions on Magnetics 12/2008; 44(11-44):3617 - 3620. DOI:10.1109/TMAG.2008.2002532 · 1.39 Impact Factor
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    ABSTRACT: Read heads using current-perpendicular-to-plane (CPP) giant magnetoresistance sensors have been fabricated and tested under high-density recording conditions. A magnetoresistance of 5.5% and shield-to-shield spacing of 45 nm have been achieved by using an all-metal single-spin-valve with Heusler-alloy-based free and reference magnetic layers. Read heads with magnetic read widths ~45 nm were tested on perpendicular media, resulting in signals above 1 mV and signal-to-noise ratio ~30 dB. Linear densities in excess of 1050 kbpi were achieved with thermal fly-height control, compatible with recording areal densities of ~400 Gb/in<sup>2</sup>. Current-induced spin-torque effects in the recording head were observed to result in rapid performance degradation above a threshold bias voltage of about 75 mV, corresponding to current densities >10<sup>8</sup> A/cm<sup>2</sup>.
    IEEE Transactions on Magnetics 02/2008; 44(1-44):90 - 94. DOI:10.1109/TMAG.2007.911019 · 1.39 Impact Factor
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    ABSTRACT: As the areal density of magnetic recording increases well beyond 100 Gb/in<sup>2</sup>, the critical dimensions of recording heads continue to shrink at a rate of 15%-30% per year. Read sensors with 100 nm physical read widths are being routinely fabricated using undercut resist images and solvent-based liftoff processes. However, because standard liftoff processes using undercut photoresist images have reached their limits and cannot be performed reliably below 100 nm, sensor stabilization with a hard magnet contiguous junction is compromised because of induced variations in junction profile and hard magnet geometry. Furthermore, poor liftoff can induce fencing and excessive read gap topography leading to side reading and poor sensor performance. An alternative sensor patterning approach is proposed based on chemical mechanical polishing (CMP) and no-undercut resist images to define the read sensors critical dimensions. Ultra-narrow giant magnetoresistive (GMR) read heads have been successfully fabricated with physical read widths in the 20-80 nm range and using various sensor designs: Current in-plane (CIP) GMR, current perpendicular to the plane (CPP) GMR, and CPP tunnel magnetoresistive (CPP-TMR) sensors
    IEEE Transactions on Magnetics 11/2006; 42(10-42):2434 - 2437. DOI:10.1109/TMAG.2006.878696 · 1.39 Impact Factor
  • R. E. Fontana · S. R. Hetzler
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    ABSTRACT: A variety of magnetic memory devices, including MRAM, spin-torque RAM, plated wire, and bubbles, either are or have been under investigation as candidate “universal memory” devices. Such devices would combine the performance attributes of DRAM with the nonvolatility of a disk drive. This paper examines the past and present magnetic memories from two perspectives: (1) processing and extendability to smaller dimensions, and (2) the memory hierarchy of the applications to which they are directed. From a processing requirement, magnetic memories must converge to the cell sizes of competitive memory technologies, which range from 8F2 for DRAM to 0.5F2 for disk drives, where F is the minimum processing feature. From a memory hierarchy perspective, magnetic memories must balance the advantages of nonvolatility with the market demands for performance and low cost, and must address the application shifts away from classical enterprise storage hierarchy to the now rapidly developing mobile storage needs. The success of magnetic memories will depend on their ability to fulfill the evolving memory hierarchy requirements of a large set of new and nontraditional applications and on their ability to approach the device sizes of competing DRAM and flash devices.
    Journal of Applied Physics 04/2006; 99(8):08N902-08N902-6. DOI:10.1063/1.2162476 · 2.18 Impact Factor
  • R. E. Fontana · T. R. Albrecht · S. R. Hetzler
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    ABSTRACT: This paper approaches future areal density estimation for storage (tape, disk, and NAND flash) using processing and in particular minimum feature roadmaps. And discusses the process implications faced by recording storage for achieving these projections especially in the 2010 time period when disk areal densities are projected at 500 Gbit/in2, when disk drive minimum features converge with NAND flash features projected at 35 nm, and when a transition from continuous to patterned media may occur. The annual increases in IC memory density set the areal density increases that disk drives must achieve to maintain present day cost per bit ratios with solid state memory applications. Second, patterned media requires the formation of read and write sensors with dimensions that coincide with NAND flash dimensions. In sum, novel and cost effective minimum feature processing must be anticipated in order to sustain areal density growth for magnetic recording.
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    Jeffrey R. Childress · Robert E. Fontana
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    ABSTRACT: Since the invention of the hard-disk drive in 1956, the technology of the magnetic head sensor has never ceased to evolve. Today's sensors are drastically different from those used in these early heads; they can detect and transmit information from recorded data at densities greater than 200 Gbit/in2 and data rates approaching 1 GHz. Numerous advances in nanomagnetics, magnetic ultrathin films, magneto-electronics, as well as device processing, have fueled the remarkable progress of this technology. An overview of the science and technology behind magnetic read head sensors is presented. The dimensional, geometrical and magnetic requirements for the heads are first described, followed by a description of the state of the art giant-magnetoresistive read sensors. We then discuss characteristics and potential advantages of next-generation read sensors, including current-perpendicular-to-plane tunnel-magnetoresistance and giant magnetoresistive sensors. The interplay between sensor properties, size requirements, process limitations and head performance is emphasized. To cite this article: J.R. Childress, R.E. Fontana Jr., C. R. Physique 6 (2005).
    Comptes Rendus Physique 11/2005; 6(9):997-1012. DOI:10.1016/j.crhy.2005.11.001 · 2.04 Impact Factor
  • M.K. Ho · Ching Tsang · J. Childress · R. Fontana · J. Katine · K. Carey
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    ABSTRACT: The in-stack stabilization of unshielded and shielded magnetic tunnel junction (MTJ) sensors have been studied experimentally by quasi-static and recording tests as well as theoretically by micromagnetic modeling. Results showed the viability of in-stack stabilization over a range of design and material conditions. Performance tradeoff studies and design optimization results led to the fabrication of MTJ read heads with good magnetic stability and high readback sensitivity.
    IEEE Transactions on Magnetics 02/2004; 40(1-40):189 - 194. DOI:10.1109/TMAG.2003.821201 · 1.39 Impact Factor
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    ABSTRACT: Doping ferromagnetic nickel–iron alloys with chromium causes the Curie temperature to be reduced. We have demonstrated that solid state solutions of Ni–Fe–Cr can be formed by implanting Cr ions into ferromagnetic NiFe alloy films, thus creating paramagnetic films. We find that the magnetic moment and coercivity decrease steadily with Cr+ dose, reaching zero at room temperature with the onset of paramagnetism. Using Cr+ implantation in conjunction with a lithographic mask we have patterned continuous Ni80Fe20 films into separate regions that are ferromagnetic and paramagnetic at room temperature. This magnetic patterning process may have applications for the manufacture of magnetic write heads, such as for the notching process used to constrain the stray field from the write gap.
    Journal of Physics D Applied Physics 10/2003; 36(21):2601. DOI:10.1088/0022-3727/36/21/001 · 2.72 Impact Factor
  • M. Tsoi · R. E. Fontana · S. S. P. Parkin
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    ABSTRACT: The current-induced propagation of magnetic domain walls is studied in CoFe nanoconstrictions patterned by electron beam lithography. Propagation of the walls was confirmed by magnetic force microscopy imaging. The device geometry allows us to distinguish between various mechanisms of interaction between electric current and domain walls: a mechanism in which spin transfer associated with current traversing a domain wall dominates. As expected for such a mechanism the domain wall propagation occurs in the direction of electron current flow and has a current threshold of the order ∼ 1011 A/m2. © 2003 American Institute of Physics.
    Applied Physics Letters 09/2003; 83(13):2617-2619. DOI:10.1063/1.1578165 · 3.30 Impact Factor
  • J. R. Childress · J.-S. Py · M. K. Ho · R. E. Fontana · BA Gurney
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    ABSTRACT: The properties of magnetic tunnel junctions with aluminum oxide barriers alloyed with boron are presented. When aluminum is deposited by sputtering, 10 at. % B addition is sufficient to completely transform the deposited Al film from crystalline to amorphous. We have investigated if the deposition of amorphous AlB prior to oxidation results in a variation of tunnel-valve properties. It is found that ultrathin Al90B10 films can be readily oxidized using a procedure similar to that for Al films, resulting in tunnel valves with good magnetic properties. In the ultrathin regime (when the specific junction resistance is Rj
    Journal of Applied Physics 05/2003; 93:6426-6428. DOI:10.1063/1.1556925 · 2.18 Impact Factor
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    ABSTRACT: In this article, we discuss practical factors in the application of TEM as part of development of processing of magnetic nanostructures.
    Magnetics Conference, 2003. INTERMAG 2003. IEEE International; 01/2003