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ABSTRACT: In this paper, we propose an improved low complexity algorithm for spatial scalability of H.264/SVC on the basis of the motions in the sequences. First, verification is performed to confirm the redundancy of the previous motion estimation process of H.264/SVC. Then, based on the evaluation results we propose an improved algorithm for our previous work which only focuses on the complexity reduction of enhancement layer. The proposed algorithm can decrease the computation complexity of the base layer using the features of the hierarchical B-picture structure. The proposed algorithm is evaluated using reference software JSVM. The simulation results show that the proposed algorithm can achieve over 90% computation complexity reduction comparing to the original JSVM algorithm. When it is compared with our previous works and some other previous works, 10% complexity reduction and over 27% time saving have been achieved, respectively.
Image Processing (ICIP), 2010 17th IEEE International Conference on; 10/2010
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ABSTRACT: The inter-layer residual prediction mode can increase the coding efficiency as well as the computation complexity. This paper presents a low complexity algorithm for inter-layer residual prediction of H.264/SVC. Proposed two-step algorithm focuses on the reduction of the candidate modes by making use of the correlations of the encoding cost between the base layer and enhancement layers. In the first step, the ordinary routine of rate-distortion optimization (RDO) for H.264/AVC is performed and a temporary best mode (TBM) is selected. Then, in the second step the encoding cost of the TBM and the candidate modes in the enhancement layer are compared to determine the redundant coding modes from all the candidate modes. The experiment results show that proposed algorithm can considerably reduce redundant computation complexity with almost no coding efficiency loss.
Image Processing (ICIP), 2009 16th IEEE International Conference on; 12/2009
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ABSTRACT: In this work, a fast mode decision algorithm for H.264/AVC is proposed. H.264/AVC achieves high coding efficiency by introducing rate-distortion optimized (RDO) method. However, it induced very high computation complexity. In order to reduce the computation complexity of the encoder of H.264/AVC, the proposed algorithm efficiently reduces the candidate modes. The proposed algorithm includes an early skip mode decision method and an adaptive rate distortion cost threshold for early INTER mode decision. An complexity reduction algorithm for INTRA modes which uses the information during INTER mode selection is also proposed. The experimental results show that compared with full-search algorithm the proposed algorithm can achieve up to 70-89% speed up with very slight PSNR loss.
Consumer Electronics, 2009. ISCE '09. IEEE 13th International Symposium on; 06/2009
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ABSTRACT: In this paper, we present a novel adaptive GOP structure(AGS) for H.264/SVC. Proposed method adaptively defines the GOP structure by analyzing the input sequence characters. The accumulated difference of luminance pixel components is utilized to set a threshold for adaptive GOP size definition. Another scene change detection method is also proposed to reorganize the GOP structure. Different from previous AGS methods, the proposed method concentrates on the coding efficiency improvement on the basis of the Hierarchical B-picture structure. The simulation results show that proposed AGS method can improve up to 0.2 dB of PSNR compared with fixed size GOP methods.
Innovative Computing Information and Control, 2008. ICICIC '08. 3rd International Conference on; 07/2008
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ABSTRACT: In this work, a fast implementation method for deblocking filter of H.264/AVC and its architecture are proposed. Proposed method makes use of the correlation of the adjacent pixels to decrease the redundant processing cycles. Simulation results show that using proposed method, the average coding cycles for one macroblock is reduced to 170. It is fast than that of the previous works which considered that the least filtering cycles number for one macroblock is 192. This work also provide an efficient architecture for the proposed method in which a parallel memory access solution and a novel comparison module are proposed. Implementation results show that the proposed architecture can be realized by only 30.14 K gates.
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, 2008. ECTI-CON 2008. 5th International Conference on; 06/2008
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ABSTRACT: In this paper a fast processing architecture for the transform and quantization of the H.264/AVC, named DQ engine, is proposed. Compare with the traditional architecture, proposed DQ engine architecture could achieve 2 times fast processing of transform and quantization together with the inverse transform and inverse quantization when the rate-distortion optimization is performed. Moreover, proposed architecture introduced an all-zero block detection architecture which could cut down the redundant processing of the all-zero coefficient blocks. A bit estimation architecture is also introduced into the DQ Engine to fulfill fast estimation of the generated bits. Implementation results show that the proposed architecture could be fulfilled with only 126,728 transistors.
Signal Design and Its Applications in Communications, 2007. IWSDA 2007. 3rd International Workshop on; 10/2007
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ABSTRACT: In this paper, a novel variable search range algorithm is proposed for the H.264/AVC. First we evaluate the influence on the bitrate and PSNR when the search range is set from a small range to a increasing wide range. The simulation shows interesting results that sometimes when the search range is set to a smaller search range it can achieve better result at both the bitrate and the PSNR comparing with the reference software with the fixed search range of 16 times 16. Furthermore, we find that how much the search range could be reduced to achieve an optimum search range have strong relation with the average of the frame motion vectors. Based on these simulation results a adaptive search range algorithm which estimate the most efficient search range from the previous frames with a adaptively search range adjustment method is proposed. Simulation results show that proposed algorithm could achieve the motion estimation by average 45% computation complexity compare with the reference software with equivalent PSNR and the bitrate results.
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on; 06/2007
