T Minami

Publications (2)0 Total impact

• Conference Proceeding: A 65 nm CMOS technology with a high-performance and low-leakage transistor, a 0.55 μm2 6T-SRAM cell and robust hybrid-ULK/Cu interconnects for mobile multimedia applications

  S. Nakai, M. Kojima, N. Misawa, M. Miyajima, S. Asai, S. Inagaki, Y. Iba, T. Ohba, M. Kase, H. Kitada, [......], N. Horiguchi, H. Matsuyama, T. Minami, M. Minamizawa, H. Morioka, E. Yano, A. Yamaguchi, K. Watanabe, T. Nakamura, T. Sugii
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  ABSTRACT: This paper presents a 65 nm CMOS technology for mobile multimedia applications. The reduction of interconnect capacitance is essential for high-speed data transmission and small power consumption for mobile core chips. We have chosen a hybrid ULK structure which consists of NCS (nano-clustering silica; k=2.25) at the wire level and SiOC (k=2.9) at the via level. Although NCS is a porous material, the NCS/SiOC structure has sufficient mechanical strength to endure CMP pressure and wire bonding. Successfully fabricated 200 nm-pitch hybrid-ULK/Cu interconnects and a high-performance and low-leakage transistors meet the electrical targets from the circuit requirements. Moreover, an embedded 6T-SRAM with a 0.55 μm² small cell size has been achieved.
  Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International; 01/2004
• Conference Proceeding: Local flare effects and correction in ArF lithography

  T. Yao, M. Osawa, T. Minami, N. Yamamoto, H. Aoyama, G. Okuda, T. Sawano, I. Kamatsuki, F. Sugimoto, H. Futatsuya, K. Kobayashi, K. Ogino, H. Hoshino, Y. Machida, H. Arimoto, S. Asai
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  ABSTRACT: We developed a method of correcting line width variations due to mid-range flare (which we call local flare) originating from the exposure tool. Local flare effects can be calculated using a model with a double Gaussian point spread function. Line width uniformity was improved by mask pattern correction based on our local flare effects modeling. In addition, a hybrid system that can use two optimal correction parameters with or without a double-exposure region was applied to gate layer lithography. Its results confirmed that our local flare correction method is very effective for obtaining high CD uniformity.
  VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on; 07/2003