Rajesh Gupta

University of California, Irvine, Irvine, CA, USA

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Publications (4)0 Total impact

  • Source
    Article: System-on-Chip Modeling Using Objects and Their Relationships Frederic Doucet, Vivek Sinha, Chuck Siska, Rajesh Gupta
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    ABSTRACT: System conceptualization and modeling requires support for both hardware and software components specification, and the ability to do complete system simulation rapidly and accurately. In this paper, we present a system engineering methodology that is built upon the definition and implementation of object relationship. Our approach allows a designer to build an executable, simulatable as well as syntesizable system model using the same language platform. We show how class interfaces can be used for structural representation throughout all design abstraction levels. The object oriented methodology allows IP-Reuse through object libraries and design patterns, and automatic documentation generation. The design process employs an extended UML (Unified Modeling Language) notation and classes from Scenic and ICSP class libraries. We describe our implementation of a prototype that supports our design methodology. Contents 1
    12/2001;
  • Source
    Article: Polymorphic C++ Debugging for System Design
    Frederic Doucet, Rajesh Gupta
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    ABSTRACT: SystemC and CynApps libraries makes the use of the C++ language for system design possible. However, designers use it the same way they use HDLs: they model the hardware part of the design at the register transfer level, or wire level. In particular, extensive use of object oriented mechanisms (as in software) is restricted. Usually, this is because these features are difficult to conceptualize, simulate and to synthesize. This paper addresses the use in system design of one of these mechanism for hardware design, polymorphism, and the associated debugging problems. The C++ implementation of polymorphism relies on pointer manipulation. We describe how pointers have been identified as useful, the capability of their usage, and describe how to solve some of the associated debugging problems.
    12/2001;
  • Source
    Article: Structural Design Composition for C++ Hardware Models
    Frederic Doucet, Vivek Sinha, Rajesh Gupta
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    ABSTRACT: This paper addresses the modeling of layout structure in high level C++ models. Researchers agree that the level of abstraction for integrated circuit design needs to be raised. New languages and methodologies are being proposed, most of them influenced from the software engineering domain. However, one of the fundamental hardware design challenges is often overlooked as push button synthesis solutions are sought: physical design predictability. In this paper we describe how C++ constructs should be used to capture structural and physical implementation concerns. Our explanation relies on the importance of the floorplan and component placement estimations at high levels of abstraction. We highlight how using object oriented mechanisms eases the structural modeling of circuit components, and we present a C++ class library design to specify these structural concerns.
    07/2001;
  • Source
    Article: YAML: a tool for hardware design visualization and capture
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    ABSTRACT: Design visualization is an important part of the system design process. In practice, systems are often visualized using a combination of structural and functional entities. In this paper, we describe an approach that helps to capture the structural aspects of a design at a high level of abstraction and enables the system designer to enter designs "schematically" using predefined structural and functional entities conforming to UML notation. The corresponding tool, YAML (Yet Another UML front end) provides support for modeling objects and a range of object relationships that are crucial to real-life embedded system designs. A YAML design entry can then be automatically translated into synthesizable C++ code for simulation and hardware synthesis.
    10/2000;

Institutions

  • 2000
    • University of California, Irvine
      • Center for Embedded Computer Systems (CECS)
      Irvine, CA, USA