Nobuyuki Yamasaki

Keio University, Edo, Tōkyō, Japan

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Publications (55)2.39 Total impact

  • Hiroyuki Chishiro, James H. Anderson, Nobuyuki Yamasaki
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    ABSTRACT: Existing multiprocessor real-time scheduling algorithms follow partitioning/global scheduling approaches or some hybrid approaches of the two. Under partitioning, all tasks are assigned to specific processors. Under global scheduling, tasks may migrate among processors. Global scheduling has the advantage of better schedulability compared to partitioning. However, optimal algorithms based on global scheduling such as PD2 [5] and LLREF [3] incur significant overhead.
    ACM SIGBED Review 07/2013; 10(2):29-29.
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    ABSTRACT: Distributed real-time systems that consist of multiple tasks with time constraints implemented on multiple processors have been used in various embedded systems, such as humanoid robots. These processors are interconnected with a real-time network, such as Responsive Link, in which data rate of each channel can be changed individually and dynamically. In this paper, we propose a low-power communication technique for distributed real-time systems. The power consumption is reduced by slowing down the data rate of communication link while satisfying the time constraints by exploiting the slack time, which is the difference between the arrival time of data and the deadline. We first measured power consumption of Responsive Link with various data rates and then implemented a real-time network simulator using the measured power values. We also implement a run-time communication mode change mechanism on Responsive Link and discuss the feasibility. Simulation results show that the proposed low-power packet transfer technique reduces the power consumption by up to 53.46% with a negligible degradation on the schedulability.
    Embedded Multicore Socs (MCSoC), 2013 IEEE 7th International Symposium on; 01/2013
  • Hiroyuki Chishiro, Nobuyuki Yamasaki
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    ABSTRACT: Nowadays multicore systems have been used in real-time applications such as robots. In robots, imprecise tasks such as image processing tasks are required to detect and avoid objects. However, existing real-time operating systems have evaluated multiprocessor real-time scheduling algorithms in Liu and Lay land's model and have not evaluated those in the imprecise computation model. This paper performs experimental evaluations of global and partitioned semi-fixed-priority scheduling algorithms in the extended imprecise computation model on multicore systems. Experimental results show that semi-fixed-priority scheduling has comparable overhead to fixed-priority scheduling. In addition, global semi-fixed-priority scheduling has lower overhead than partitioned semi-fixed-priority scheduling.
    01/2012;
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    ABSTRACT: In this paper, we describe design and implementation of the Dependable Responsive Multithreaded Processor (D-RMTP) SoC (System-on-a-Chip) and SiP (System-in-a-Package). The D-RMTP SoC provides almost all functions required for the humanoid robots, including a real-time processing unit, a real-time inter-node communication link with error correction, and various I/O peripherals. The D-RMTP SoC is implemented in a 10mm×10mm chip with a TSMC 130nm process technology. The D-RMTP SiP implemented in a 30mm×30mm board integrates the D-RMTP SoC, DDR-SDRAM, flash memory, power supply circuit, and temperature and voltage sensors for reliable DVFS.
    IEEE Micro 01/2012; 32(6). · 2.39 Impact Factor
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    K. Matsumoto, H. Umeo, N. Yamasaki
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    ABSTRACT: Real-time execution of applications is one of key requirements for Cyber-Physical Systems (CPS) that integrate computational and physical elements for our social infrastructure, such as robotics, transportation, and consumer appliances. In such real-time systems, a task must be executed so as not to violate given time constraints. Moreover, it is desirable that the execution time of the task is predictable precisely. When Out-of-Order (OoO) execution is adopted for real-time systems to enhance the performance, it is much difficult to predict execution time because of the feature of OoO execution. In order to deal with this problem, various schemes were proposed such as IPC control mechanism of Responsive Multithreaded (RMT) Processor. RMT Processor is a real-time microprocessor adopting simultaneous multithreading (SMT) architecture with OoO execution. Its IPC control mechanism which tries to adjust the number of instruction commits to meet a given target IPC. The IPC control scheme can be implemented not only on RMT Processor but also on various processors and can improve the predictability of execution time. However, if an error between target and actual IPCs is observed, it cannot cancel the error in the next control window, which is used in the control mechanism. Since such uncorrected errors are accumulated in the successive control window, the predictability of the execution time is degraded gradually. To overcome this problem, in this paper, we propose a thread speed control scheme for real-time microprocessors. This scheme is based on the IPC control mechanism on RMT Processor. Our proposed thread speed control scheme calculates an error between reference and actual IPCs, then it dynamically updates the reference IPC of the next control window in order to cancel the past errors. Our proposed scheme is designed and implemented on RMT Processor. The simulation results show that the error is reduced to 2.60 × 10<sup>-5</sup> % in case that four threads - - are executed simultaneously.
    Embedded and Real-Time Computing Systems and Applications (RTCSA), 2011 IEEE 17th International Conference on; 10/2011
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    Shinpei Kato, Nobuyuki Yamasaki
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    ABSTRACT: This paper presents an algorithm, called Earliest Deadline Critical Laxity (EDCL), for scheduling sporadic task systems on multiprocessors. EDCL is a derivative of the Earliest Deadline Zero Laxity (EDZL) algorithm. Each job is assigned a priority based on the well-known Global Earliest Deadline First (G-EDF) algorithm, as long as its laxity – the amount of time from the earliest possible time of job completion to the deadline of job – is above a certain value. The priority is however promoted to the highest level once the laxity falls below this certain value in order to meet the deadline. Priority promotions are aligned with arrivals and completions of jobs under EDCL to avoid additional scheduler invocations, while EDZL can promote priorities arbitrarily. As compared with EDZL, EDCL reduces runtime overhead and implementation cost, but still strictly dominates G-EDF in schedulability. Schedulability tests for EDCL are derived through theoretical analysis, and sustainability properties are also considered. Our simulation results demonstrate that EDCL is competitive to EDZL in schedulability with a smaller number of scheduler invocations, and it also outperforms traditional EDF-based algorithms.
    Journal of Systems Architecture - Embedded Systems Design. 01/2011; 57:498-517.
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    ABSTRACT: Cyber Physical Systems are composed of many embedded systems which monitor and control the physical processes for tight integrations of computation and physical processes. Such embedded systems require not only real-time capabilities but also high throughput and low power consumption. High throughput is mainly achieved by parallel architectures such as Simultaneous Multithreading (SMT) and Chip Multiprocessor (CMP), and low power consumption is mainly achieved by Real-Time Dynamic Voltage and Frequency Scaling (RT-DVFS) under the real-time constraint. In this paper, we present a RT-DVFS algorithm called Hetero Efficiency to Logical Processor (HeLP) which can reduce power consumption easily and effectively in prioritized SMT processors. We also present Hetero Efficiency to Logical Processor with Temporal Migration (HeLP-TM) which applies the temporal migration technique to HeLP. Simulation results show that HeLP can reduce power consumption effectively and HeLPTM is more effective than HeLP.
    01/2011; 2:9-15.
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    Hiroyuki Chishiro, Nobuyuki Yamasaki
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    ABSTRACT: This paper presents RT-Est, which is a real-time operating system for semi-fixed-priority scheduling algorithms. RT-Est implements the following mechanisms: (i) the hybrid O(1) scheduler, which is an extension of the O(1) scheduler in Linux kernel 2.6, to achieve semi-fixed-priority scheduling with low overhead, (ii) the high resolution timer, which performs to terminate optional parts at optional deadlines, (iii) SIM, which is an architecture for simulating real-time scheduling. Experimental evaluations show that semi-fixed-priority scheduling is well suited to autonomous mobile robots.
    IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, EUC 2011, Melbourne, Australia, October 24-26, 2011; 01/2011
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    Hiroyuki Chishiro, Nobuyuki Yamasaki
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    ABSTRACT: Responsive Multithreaded Processor (RMTP) has the Si-multaneous Multithreading (SMT) architecture with prior-ity for distributed real-time processings, called prioritized SMT architecture. In RMTP, execution efficiencies of tasks executing in threads except the highest priority thread fluc-tuate by multiple combinations of tasks executing simulta-neously. Therefore, it is difficult to guarantee the schedu-lability of tasks. Many real-time scheduling algorithms having only real-time part is not well suited to the prior-itized SMT architecture. Because they cannot make use of the remaining times of threads except the highest pri-ority thread. In contrast, semi-fixed-priority scheduling has an optional part which is a non-real-time part and im-proves the quality of the result so that semi-fixed-priority scheduling is well suited to the prioritized SMT architec-ture. This paper evaluates the performance of semi-fixed-priority scheduling on prioritized SMT processors. Exper-imental evaluations show that semi-fixed-priority schedul-ing is well suited to prioritized SMT processors.
    01/2011;
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    Hiroyuki Chishiro, Nobuyuki Yamasaki
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    ABSTRACT: Current real-time systems such as robots have mul- tiprocessors and the number of processors tends to be increased. In order to achieve these real-time systems, global real-time scheduling has been required. Many real-time scheduling algo- rithms are usually based on Liu and Layland's model. Compared to Liu and Layland's model, the imprecise computation model is one of the techniques to overcome the gap between theory and practice. Semi-fixed-priority scheduling is part-level fixed- priority scheduling in the extended imprecise computation model, which has a second mandatory part to terminate an optional part. Unfortunately, current semi-fixed-priority scheduling is only adapted to uniprocessors. This paper presents a global semi- fixed-priority scheduling algorithm, called Global Rate Mono- tonic with Wind-up Part (G-RMWP). G-RMWP calculates the optional deadline, the termination time of each optional part, by Response Time Analysis for Global Rate Monotonic (G-RM). The schedulability analysis shows that one task set is schedulable by G-RMWP if the task set is schedulable by G-RM. Simulation results show that G-RMWP has higher schedulability than G- RM.
    01/2011; 1:218-223.
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    Masakazu Taniguchi, Hiroki Matsutani, Nobuyuki Yamasaki
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    ABSTRACT: Many-core processor is one of attractive solutions to Cyber-Physical Systems (CPS) that demands high computational power since it can enclose many computational elements into a single physical chip. Network-on-Chip (NoC) that connects the processing cores is the key in terms of the cost, performance, and power in such systems. Although NoCs typically employ simple deterministic routing algorithms in order to reduce the complexity of on-chip routers, such deterministic algorithms do not avoid traffic congestion and thus the network throughput is degraded when the traffic pattern has localities. On the other hand, complex algorithms require large hardware cost and will be a problem for CPS whose hardware cost is limited. In this paper, we propose an adaptive on-chip router with Predictor for Regional Congestion (PRC) in order to improve the network throughput with modest hardware overhead. The proposed PRC routers exchangetheir pastandpredictedfuturecongestioninformation with each other. Then, each router synthesizes its regional congestioninformation based on the local and received information in order to route packets without congestion. The simulationresults show that the proposed routers improve the average throughput by 17.2% compared to a congestion-aware router that employes local information only. The RTL design of the proposed router shows that the area overhead is only 2.6% and additional wiring requirement for each router port is only three.
    01/2011; 2:22-27.
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    ABSTRACT: This paper proposes semi-fixed-priority scheduling to achieve both low-jitter and high schedulability. Semi-fixed-priority scheduling is for the extended imprecise computation model, which has a wind-up part as a second mandatory part and schedules the part of each extended imprecise task with fixed-priority. This paper also proposes a novel semi-fixed-priority scheduling algorithm based on Rate Monotonic (RM), called Rate Monotonic with Wind-up Part (RMWP). RMWP limits executable ranges of wind-up parts to minimize jitter. The schedulability analysis proves that one task set is feasible by RMWP if the task set is feasible by RM. Simulation results show that RMWP has both lower jitter and higher schedulability than RM.
    16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2010, Macau, SAR, China, 23-25 August 2010; 01/2010
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    ABSTRACT: Modular component-based robot systems require not only an infrastructure for component management, but also scalability as well as real-time properties. Robot technology (RT)-middleware is a software platform for such component-based robot systems. Each component in the RT-Middleware, so-called "RT-component'' supporting particular robot functions, is based on common object request broker architecture (CORBA). Unfortunately, the RT-Middleware lacks the mechanism for real-time control. In this paper, we extend the framework of the RT-Components to take care of timing constraints. We first enable tasks to have different periods within each RT-Component. We then modify the packet format of the General Inter-ORB Protocol (GIOP) to transfer the information of timing constraints over RT-Components. The performance evaluation on ART-Linux shows that the extended RT-Component framework improves the schedulability of distributed real-time tasks, without causing critical overheads in unmarshaling the modified GIOP packets.
    Object/Component/Service-Oriented Real-Time Distributed Computing, 2009. ISORC '09. IEEE International Symposium on; 04/2009
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    Shinpei Kato, Nobuyuki Yamasaki
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    ABSTRACT: This paper presents a new algorithm for fixed-priority scheduling of sporadic task systems on multiprocessors. The algorithm is categorized to such a scheduling class that qualifies a few tasks to migrate across processors, while most tasks are fixed to particular processors. We design the algorithm so that a task is qualified to migrate, only if it cannot be assigned to any individual processors, in such a way that it is never returned to the same processor within the same period, once it is migrated from one processor to another processor. The scheduling policy is then conformed to Deadline Monotonic. According to the simulation results , the new algorithm significantly outperforms the traditiona l fixed-priority algorithms in terms of schedulability.
    15th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2009, San Francisco, CA, USA, 13-16 April 2009; 01/2009
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    Shinpei Kato, Nobuyuki Yamasaki, Yutaka Ishikawa
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    ABSTRACT: This paper presents a new algorithm for scheduling of sporadic task systems with arbitrary deadlines on identica l multiprocessor platforms. The algorithm is based on the concept of semi-partitioned scheduling, in which most task s are fixed to specific processors, while a few tasks migrate across processors. Particularly, we design the algorithm s o that tasks are qualified to migrate only if a task set cannot be partitioned any more, and such migratory tasks migrate from one processor to another processor only once in each period. The scheduling policy is then subject to Earliest Deadline First. Simulation results show that the algorithm delivers competitive scheduling performance to the state- of- the-art, with a smaller number of context switches.
    21st Euromicro Conference on Real-Time Systems, ECRTS 2009, Dublin, Ireland, July 1-3, 2009; 01/2009
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    Shinpei Kato, Yuji Fujita, Nobuyuki Yamasaki
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    ABSTRACT: Responsive Link, an ISO/IEC communication standard, provides many functional capabilities for distributed rea l- time systems. This paper is focused on periodic and ape- riodic communication techniques for Responsive Link. In periodic communication, the priority is assigned to each packet so that the network utilization is improved. A schedu - lability test for connection establishments is also derive d to ensure timing guarantees. In aperiodic communication, meanwhile, the bandwidth is reserved to improve response time as much as possible without periodic timing violations . The effectiveness of the presented techniques is demon- strated through a series of simulations.
    15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2009, Beijing, China, 24-26 August 2009; 01/2009
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    Shinpei Kato, Nobuyuki Yamasaki
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    ABSTRACT: This paper presents an algorithm, called Earliest Deadline Critical Laxity (EDCL), for the efficient scheduling of sporadic real-time tasks on multiprocessors systems. EDCL is a derivative of the Earliest Deadline Zero Laxity (EDZL) algorithm in that the priority of a job reaching certain laxity is imperiously promoted to the top, but it differs in that the occurrence of priority promotion is confined to at the release time or the completion time of a job. This modification enables EDCL to bound the number of scheduler invocations and to relax the implementation complexity of scheduler, while the schedulability is still competitive with EDZL. The schedulability test of EDCL is designed through theoretical analysis. In addition, an error in the traditional schedulability test of EDZL is corrected. Simulation studies demonstrate the effectiveness of EDCL in terms of guaranteed schedulability and exhaustive schedulability by comparing with traditional efficient scheduling algorithms.
    Embedded and Real-Time Computing Systems and Applications, 2008. RTCSA '08. 14th IEEE International Conference on; 09/2008
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    K. Funaoka, S. Kato, N. Yamasaki
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    ABSTRACT: T-R plane abstraction (TRPA) proposed in this paper is an abstraction technique of real-time scheduling on multiprocessors. This paper presents that NNLF (no nodal laxity first) based on TRPA is work-conserving and optimally solves the problem of scheduling periodic tasks on a multiprocessor system. TRPA can accommodate to dynamic environments due to its dynamic time reservation, while T-N plane abstraction (TNPA) and extended TNPA (E-TNPA) reserve processor time statically at every task release.
    Embedded and Real-Time Computing Systems and Applications, 2008. RTCSA '08. 14th IEEE International Conference on; 09/2008
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    K. Funaoka, S Kato, N. Yamasaki
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    ABSTRACT: Extended T-N plane abstraction (E-TNPA) proposed in this paper realizes work-conserving and efficient optimal real-time scheduling on multiprocessors relative to the original T-N plane abstraction (TNPA). Additionally a scheduling algorithm named NVNLF (no virtual nodal laxity first) is presented for E-TNPA. E-TNPA and NVNLF relax the restrictions of TNPA and the traditional algorithm LNREF, respectively. Arbitrary tasks can be preferentially executed by both tie-breaking rules and time apportionment policies in accordance with various system requirements with several restrictions. Simulation results show that E-TNPA significantly reduces the number of task preemptions as compared to TNPA.
    Real-Time Systems, 2008. ECRTS '08. Euromicro Conference on; 08/2008
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    K. Funaoka, A. Takeda, S. Kato, N. Yamasaki
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    ABSTRACT: Not only system performance but also energy efficiency is critically important for embedded systems. Optimal real-time scheduling is effective to not only schedulability improvement but also energy efficiency for the systems. In this paper, real-time dynamic voltage and frequency scaling (RT DVFS) techniques based on the theoretically optimal real-time static voltage and frequency scaling (RTSVFS) techniques proposed in our previous work are presented for multiprocessor systems. Simulation results show that RT-DVFS covers up the disadvantages of RT-SVFS in the sense that RTDVFS are not practically affected by the difference among systems, whereas the energy consumption of RT-SVFS highly depends on the selectable processor frequency especially in high system utilization.
    Industrial Embedded Systems, 2008. SIES 2008. International Symposium on; 07/2008