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ABSTRACT: Results of beam collimation experiments on linear field‐emitter arrays with linear planar lenses are summarized. The electron beam is imaged on a phosphor screen. In general, as lens voltage is reduced relative to the gate voltage, the elliptically shaped screen images narrow, becoming fine lines with emission currents showing only modest reductions. This reduction of emission current can be overcome by increasing the gate voltage only a few volts without affecting beam collimation. As the lens voltage is reduced, screen current decreases relative to emission current while gate current increases, indicating that some emitted electrons in this linear lens geometry cannot propagate to the anode screen. Experimental data and qualitative modeling are in fair agreement. © 1996 American Vacuum Society
Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 12/1996; · 1.34 Impact Factor
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ABSTRACT: We report emission data of silicon field emitter arrays fabricated with the ultimate goal of their integration within a planar lens structure for beam focusing experiments. The field emitters have been fabricated as linear arrays (with 20 μm separation between tips), square arrays (with 12 μm tip‐to‐tip separation), and single tips. The emitters themselves are formed on columns approximately 0.7 μm in height and 0.4 μm in diameter, and have gate aperture diameters as small as 1.1 μm. Two types of field emitter tips have been fabricated: One has been formed via isotropic etching of silicon in an SF 6 plasma, the second using an orientation‐dependent silicon wet etching procedure. Both have been sharpened with an oxidation process, and tip radii as small as 4 nm have been obtained. During testing, 14.4 μA of anode current was obtained from a single tip. From a 100 tip array, 3 mA of current was measured at a gate voltage of 85 V. From a 10 000 tip array, 14.5 mA was obtained. © 1995 American Vacuum Society
Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 04/1995; · 1.34 Impact Factor
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ABSTRACT: In this article, simulation, fabrication, and direct current (dc) characterization data are presented for column‐based silicon field emitter array (FEA) devices, made using anisotropic or isotropic etching of silicon to form emitter tips. In the design of the fabrication process, we have attempted to minimize spatial nonuniformity of process parameters affecting the geometry of the device structure, and, where possible, counteract the nonuniformity through a proper choice of processing variables. FEA devices, with as many as 232 630 tips, on 4–10 μm centers, have been successfully fabricated. The highest electron emission current measured was over 18 mA at the gate voltage of 150 V for a 6648 tip array. © 1995 American Vacuum Society
Journal of vacuum science & technology. B, Microelectronics and nanometer structures: processing, measurement, and phenomena: an official journal of the American Vacuum Society 02/1995; · 1.34 Impact Factor
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ABSTRACT: Large arrays of silicon field emitters are being produced at MCNC
for use in RF and microwave amplifiers and other high-intensity electron
beam source applications. Significant levels of both total emitted
current (up to 7 mA) and current density (7 A/cm<sup>2</sup>) are
obtained using gate electrode potentials less than 250 V with emission
efficiencies as high as 99%. Large arrays of field emitters are operated
at 100% duty cycle for over 18 hours. Data from devices with 1197 and
232 630 tips are presented, along with electrical yield statistics for
arrays of other sizes
IEEE Transactions on Electron Devices 11/1994; · 2.32 Impact Factor
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ABSTRACT: This paper describes a new fabrication approach for field emitter arrays that uncouples the emitter or column height from the gate aperture. In this approach, low pressure chemical vapor deposition (LPCVD) of SiO<sub>2</sub>, which deposits conformally on the tip-on-post structure, is employed followed by a series of photoresist planarization layers and side wall SiO<sub>2</sub> etch procedures to create small apertures. This procedure is fundamentally different from previous planarization and etch-back techniques
Vacuum Microelectronics Conference, 1995. IVMC., 1995 International;
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ABSTRACT: We report on the simulation and fabrication of and experimental
results from field-emitter arrays (FEAs) with linear planar lenses,
where the voltages of the lens electrodes can be independently
controlled
Vacuum Microelectronics Conference, 1995. IVMC., 1995 International;
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ABSTRACT: Oxidation sharpening techniques provide sharp silicon field
emitter tips for low voltage operation of vacuum microelectronic
devices, as well as for other applications including electron sources
for SEMs and high spatial resolution, multi-beam, e-beam lithography. In
the baseline fabrication sequence for self-aligned gated silicon field
emitter, oxidation sharpening processes can be performed either prior to
the gate metal deposition (“pre-metal” case), or after the
gate metal is already in place (“post-metal” case). Although
sharp tips (2-4 nm radii of curvature) can be obtained with either
method, the shape of the sharpened tips is different in the two cases,
primarily due to the fact that the nitride caps initially used as etch
masks are present in the pre-metal case, but absent in the post-metal
case. We present here a series of TEM micrographs illustrating the
morphological evolution of silicon field emitter tips as a function of
oxidation sharpening time. We also present Auger spectrometry data and
sheet resistance measurements performed on the gate metal after the
observed agglomeration in the post-metal case
Vacuum Microelectronics Conference, 1995. IVMC., 1995 International;
