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Z. Wei,
Y. Kanzawa, K. Arita,
Y. Katoh,
K. Kawai,
S. Muraoka,
S. Mitani,
S. Fujii,
K. Katayama,
M. Iijima, [......],
A. Himeno,
T. Okada,
R. Azuma,
K. Shimakawa,
H. Sugaya,
T. Takagi,
R. Yasuhara,
K. Horiba,
H. Kumigashira,
M. Oshima
[show abstract]
[hide abstract]
ABSTRACT: Highly reliable TaO<sub>x</sub> ReRAM has been successfully demonstrated. The memory cell shows stable pulse switching with endurance over 10<sup>9</sup> cycles, sufficient retention exceeding 10 years at 85degC. TaO<sub>x</sub> exhibits stable high and low resistance states based on the redox reaction mechanism, confirmed by HX-PES directly for the first time. An 8 kbit 1T1R memory array with a good operating window has been fabricated using the standard 0.18 mum CMOS process.
Electron Devices Meeting, 2008. IEDM 2008. IEEE International; 01/2009
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J. Kawahara,
M. Ueki,
M. Tagami,
K. Yako,
H. Yamamoto,
F. Ito,
H. Nagase,
S. Saito,
N. Furutake,
T. Onodera,
T. Takeuchi,
H. Nakamura, K. Arita,
K. Motoyama,
E. Nakazawa,
K. Fujii,
M. Sekine,
N. Okada,
Y. Hayashi
[show abstract]
[hide abstract]
ABSTRACT: A new direct low-k/Cu dual damascene (DD) contact line has been developed for low loss (low parasitic capacitance and low resistance) CMOS device platforms by on-current BEOL technologies. The excellent low contact resistance is realized in the low-k pre-metal-dielectrics (PMD) with a reduced aspect ratio, achieving 5.4 Omega for 75 nmphi contact which is only 1/4 relative to a conventional W-plug. The CMOS active performance was improved with no reliability degradation, featuring in cost-effective RF/ubiquitous applications.
VLSI Technology, 2008 Symposium on; 07/2008
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S. Yokogawa,
K. Kikuta,
H. Tsuchiya,
T. Takewaki,
M. Suzuki,
H. Toyoshima,
Y. Kakuhara,
N. Kawahara,
T. Usami,
K. Ohto,
K. Fujii,
Y. Tsuchiya, K. Arita,
K. Motoyama,
M. Tohara,
T. Taiji,
T. Kurokawa,
M. Sekine
[show abstract]
[hide abstract]
ABSTRACT: We investigated tradeoff characteristics between resistivity and reliability for scaled-down Cu-based interconnects. A unique resistivity-measurement technique is proposed to detect influences due to impurity doping. Using this technique, we investigated the impacts of the impurity doping on three types of copper interconnects - cobalt-tungsten-phosphorous (CoWP) metal-cap interconnects, plasma-enhanced chemical-vapor-deposition self-aligned barrier interconnects, and CuAl alloy interconnects - and clarified the tradeoffs between the resistivity and the reliability. We found that the metal-cap interconnect shows not only high reliability but also outstanding efficiency with regard to the suppression of resistance increase due to impurity doping.
IEEE Transactions on Electron Devices 02/2008; · 2.32 Impact Factor
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S. Muraoka,
K. Osano,
Y. Kanzawa,
S. Mitani,
S. Fujii,
K. Katayama,
Y. Katoh,
Z. Wei,
T. Mikawa, K. Arita,
Y. Kawashima,
R. Azuma,
K. Kawai,
K. Shimakawa,
A. Odagawa,
T. Takagi
[show abstract]
[hide abstract]
ABSTRACT: A novel iron oxide (Fe-O) ReRAM is proposed and its high-speed resistance-switching of 10 ns is demonstrated. The switching mechanism is confirmed as a redox reaction between Fe<sub>3</sub>O<sub>4</sub> and y-Fe<sub>2</sub>O<sub>3</sub>. Based on this model, we have achieved long-retention characteristics by introducing Zn atoms to suppress the reduction process.
Electron Devices Meeting, 2007. IEDM 2007. IEEE International; 01/2008
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S. Yokogawa,
K. Kikuta,
H. Tsuchiya,
T. Takewaki,
M. Suzuki,
H. Toyoshima,
Y. Kakuhara,
N. Kawahara,
T. Usami,
K. Ohto,
K. Fujii,
Y. Tsuchiya, K. Arita,
K. Motoyama,
M. Tohara,
T. Taiji,
T. Kurokawa,
M. Sekine
[show abstract]
[hide abstract]
ABSTRACT: A novel resistivity measurement technique has been proposed for scaled-down Cu interconnects viewing the high-reliability automobile applications. This technique enables to detect the interconnect resistivity dependence on impurity concentration, free from dimension dependence. Using this technique, we investigated impacts of impurity concentration on three types of Cu interconnects: 1) CoWP cap; 2) PECVD self-aligned barrier (PSAB); and 3) CuAl interconnects and clarified the tradeoffs between resistivity and reliability. We have found that CoWP cap shows not only high-reliability but also an outstanding efficiency in suppression of resistance increase due to impurity-induced scattering, indicating that it is the most viable candidate for automobile applications in 32nm generation and beyond
Electron Devices Meeting, 2006. IEDM '06. International; 01/2007
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N. Kawahara,
M. Tagami,
B. Withers,
Y. Kakuhara,
H. Imura,
K. Ohto,
T. Taiji, K. Arita,
T. Kurokawa,
M. Nagase,
T. Maruyama,
N. Oda,
Y. Hayashi,
J. Jacobs,
M. Sakurai,
M. Sekine,
K. Ueno
[show abstract]
[hide abstract]
ABSTRACT: A novel CoWP cap integration technology for lower leakage current and improved dielectric reliability is proposed for porous low-k/Cu interconnects, NH<sub>3</sub> plasma treatment before SiCN deposition reduces leakage current and improves dielectric reliability such as time-dependent dielectric break-down (TDDB) of CoWP capped Cu interconnects. The TDDB lifetime much longer than 10 years is obtained. Moreover, the leakage current less than IE-14A/mm is obtained by low-k top (LKT) dielectric structure combined with the NH<sub>3</sub> plasma treatment. In addition, 10% lower RC product is obtained by the LKT structure with CoWP cap
Interconnect Technology Conference, 2006 International; 07/2006
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M. Abe,
M. Tada,
H. Ohtake,
N. Furutake,
M. Narihiro,
K. Arai,
T. Takeuchi,
S. Saito,
T. Tayi,
K. Motoyama, [......], K. Arita,
F. Ito,
H. Yamamoto,
M. Tagami,
T. Tonegawa,
Y. Tsuchiya,
K. Fujii,
N. Oda,
M. Sekine,
Y. Hayashi
[show abstract]
[hide abstract]
ABSTRACT: By a novel oxygen absorption process, low oxygen-content Cu-alloy is implemented for fully-scaled-down, 45 nm-node dual damascene interconnects (DDIs) with 140 nm-pitched lines and 70 nmOslash-vias. In this process, a very thin metal film as an oxygen absorber, which has larger negative change in the standard Gibbs free energy of oxidation than a barrier metal, is put on a natural oxide at a surface of electro-plated, Cu film. The oxygen atoms diffuse to the oxygen absorber, not to the barrier metal under the Cu film, achieving high quality Cu/barrier interface after annealing. Combining the oxygen absorption process with Cu-alloy process, 45 nm-node DDI in molecular-pore-stacking (MPS) SiOCH film is successfully obtained with high endurances for SIV, EM and TDDB
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International; 01/2006
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[show abstract]
[hide abstract]
ABSTRACT: Misalignment-tolerant, Cu dual damascene interconnects (DDI) are successfully obtained in low-k SiOCH film (k=2.9) by a novel via-first multi-hard-mask (VF-MHM) process without via-poisoning of the photo-resist. In the VF-MHM, the etching sequence has higher misalignment margin between the vias and the upper lines in the Cu DDI as compared with a conventional trench-first one (TF-MHM). The VF-MHM process improves the fabrication yield and TDDB reliability of low-k/Cu-DDIs, and is a key scheme for sub-100 nm-node, ASIC fabrication.
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International; 01/2004
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K. Ueno,
M. Suzuki,
A. Matsumoto,
K. Motoyama,
T. Tonegawa,
N. Ito, K. Arita,
Y. Tsuchiya,
T. Wake,
A. Kubo,
K. Sugai,
N. Oda,
H. Miyamoto,
S. Saito
[show abstract]
[hide abstract]
ABSTRACT: Direct-contact via (DCV) structure in which a Cu via-plug is
directly contacted to an interconnect is proposed for a high reliability
and high performance Cu dual-damascene (DD) interconnection.
Distribution of electromigration (EM) lifetime is dramatically reduced
to 0.1 by eliminating void formation at the via-bottom. The developed
technology improves the lifetime of the early failure by 5 times. It
leads to 1.7 times higher clock frequency due to the higher current
density
Electron Devices Meeting, 2000. IEDM Technical Digest. International; 02/2000
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[show abstract]
[hide abstract]
ABSTRACT: A description is given of the Solid Creation System (SCS), which
allows for the creation of 3-D model directly from CAD (computer-aided
design) data in a short time, using a lithographic technique. The SCS
consists of a laser scanning device, a UV resin box, and a system
controller. The authors introduce the hardware and software technologies
of the SCS and present the possibilities of applications for creating
models using SCS
Industrial Electronics, Control and Instrumentation, 1991. Proceedings. IECON '91., 1991 International Conference on; 12/1991
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Lettere al Nuovo Cimento 01/1978; 21(10):337-341.
