-
T.T. Vo,
T. Lacrevaz,
C. Bermond,
T. Bertaud,
B. Flechet,
A. Farcy,
Y. Morand,
S. Blonkowski, J. Torres,
B. Guigues,
E. Defay
[show abstract]
[hide abstract]
ABSTRACT: Integration of high permittivity dielectrics or commonly named high- k dielectrics is widely investigated as a way to reduce passive component size in the chip. The complex permittivity microwave characterisation of medium- k materials such as HfO<sub>2</sub> and high- k materials such as SrTiO<sub>3</sub> is presented. The characterisation method, using coplanar, microstrip waveguides or metal-insulator-metal (MIM) capacitor, allows a large band characterisation, from 40-MHz to 40-GHz. It also allows investigating these materials with a large-scale thickness, from 10 up to 500-nm, in different technological configurations, appropriate for insulators from immature to mature, that is, those which are ready for the integration in an advanced damascene architecture of MIM capacitor. It is shown that the permittivity of such materials can be process- and frequency-dependent.
IET Microwaves Antennas & Propagation 01/2009; · 0.68 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: High-frequency characterizations of ultra thin 32 nm PECVD Si<sub>3</sub>N<sub>4</sub> dielectric in an advanced metal-insulator-metal (MIM) capacitors are presented, with focus on the impact of design on the performance of MIM capacitors. Frequency dependent capacitance has been extracted over a wide range of frequency bandwidth. An equivalent model circuit of capacitors including four parameters was developed to explain this behavior. The results have been compared with the values obtained from a 3-D electromagnetic modeling. A specific chart has been introduced to predict the electrical performance of new MIM capacitor designs.
IEEE Transactions on Components and Packaging Technologies 10/2008; · 0.94 Impact Factor
-
R. Gras,
F. Gaillard,
D. Bouchu,
A. Farcy,
E. Petitprez,
B. Icard,
J. C. Le-Denmat,
L. Pain,
J. Bustos,
P. H. Haumesser, [......],
C. Borowiak,
M. Rivoire,
C. Euvrard,
V. Arnal,
S. Olivier,
S. Moreau,
M. Mellier,
T. Chevolleau,
G. Passemard, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: Air gaps were successfully integrated in a multi level metallization interconnect stack using 65 nm design rules on 300 mm wafers. The proposed approach allows a low cost integration of localized air cavities using a sacrificial material to solve via misalignment issues. Air gap integration is shown to be mechanically robust and presents excellent electrical results with high gains on RC delays. In addition, air gaps structures tested in electromigration pass the targeted lifetime criterion. This easily scalable approach can be seriously considered either in aggressive interconnect geometries or in specific applications of existing technologies for which high electrical performance is locally required.
Interconnect Technology Conference, 2008. IITC 2008. International; 07/2008
-
[show abstract]
[hide abstract]
ABSTRACT: Wireless interconnections in integrated circuits are a new alternative for distribution of clock between functions or chips. We propose integrated antennas in technology CMOS 0.12 mum allowing to transmit signals on chip in the frequency band of 10 GHz to 40 GHz and millimetre-length distances. The electromagnetic interferencepsilas generated by the radiation of the antennas and the other interconnections are studied in order to evaluate the feasibility of this innovative solution. The first constructed prototypes allow a transmission of -17 dB a distance of 2.5 mm which corresponds to one of the best currently known transmission for integrated wireless interconnection.
Electrotechnical Conference, 2008. MELECON 2008. The 14th IEEE Mediterranean; 06/2008
-
[show abstract]
[hide abstract]
ABSTRACT: High-frequency (HF) characterisations of 2D and 3D metal-insulator-metal (MIM) damascene capacitors are presented focusing on the impact of the MIM architecture on the HF performance of capacitors integrated in the back end of line with Si<sub>3</sub>N<sub>4</sub> as the insulating material. Dedicated test structures were integrated and HF characterisation methods developed. Results show that properties (parasitic inductance and cutoff frequency) of MIM capacitors improve with the 3D architecture.
Electronics Letters 02/2008; · 0.96 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: The complex permittivity microwave characterization of medium-k materials as HfO<sub>2</sub> and high-k materials as STO is presented. The characterization method, using coplanar or microstrip waveguides, allows a large band characterization, from 40 MHz to 40 GHz. It also allows investigating these materials with large scale thickness, from 10 nm up to 500 nm, in a configuration which can be very close to their final integration in an advanced damascene architecture of MIM capacitor. We show that the permittivity of such materials can be process and frequency-dependent.
Microwave Conference, 2007. APMC 2007. Asia-Pacific; 01/2008
-
S. Capraro,
C. Bermond,
T.T. Vo,
J. Piquet,
B. Flechet,
M. Thomas,
A. Farcy, J. Torres,
S. Cremer,
E. Guichard,
A. Haen
[show abstract]
[hide abstract]
ABSTRACT: High frequency characterizations and simulations of 3D damascene metal-insulator-metal (MIM) capacitors are presented. We focused on the impact of the design on the performance of integrated capacitors. Results showed that properties of MIM capacitor get improved with specific design recommendations on electrodes shape.
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European; 10/2007
-
M. Thomas,
A. Farcy,
C. Perrot,
E. Deloffre,
M. Gros-Jean,
D. Benoit,
C. Richard,
P. Caubet,
S. Guillaumet,
R. Pantel,
M. Cordeau,
J. Piquet,
C. Bermond,
B. Flechet,
B. Chenevier, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: A new simple 3D Damascene architecture requiring only one additional mask is introduced for high-density MIM capacitors. TiN/Ta<sub>2</sub>O<sub>5</sub>/TiN stack deposited by PEALD has been integrated between Cu interconnect levels to maximize quality factor Q, reaching up to 17 fF/μm<sup>2</sup> capacitance. High-performance, breakdown voltages over 15 V and good linearity, C<sub>1</sub> = 76 ppm/V and C<sub>2</sub> = 63 ppm/V<sup>2</sup> at 100 kHz, make this capacitor an unique solution for analog and RF applications embedded in Cu BEOL.
VLSI Technology, 2007 IEEE Symposium on; 07/2007
-
[show abstract]
[hide abstract]
ABSTRACT: High frequency characterizations and simulations of advanced metal-insulator-metal (MIM) capacitors in Cu/low-k backend interconnection process are presented. First, we focus on the impact of silicon substrate and design of MIM capacitors on high frequency performance. Numerical results obtained by a 3D electromagnetic modeling are validated by comparison to experimental results. Second, we show the possibility to increase HF electrical performance of MIM capacitor with optimized design and integration of new medium or high-k materials.
Microwave Symposium, 2007. IEEE/MTT-S International; 07/2007
-
L.G. Gosset,
F. Gaillard,
D. Bouchu,
R. Gras,
J. de Pontcharra,
S. Orain,
O. Cueto,
P. Lyan,
O. Louveau,
G. Passemard, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: The introduction of air gaps in multi-level Cu interconnect stacks will be mandatory to achieve high performance signal propagation characteristics for advanced technology node. In this paper, air cavities were successfully introduced in a two-metal level interconnect stack using respectively a polymer and a sacrificial SiO<sub>2</sub> at via and metal levels. Combined with a diluted HF chemistry and specific HF diffusion pathways patterned in a SiC liner, the ability to localize the introduction of air cavities in a dedicated large electrical area was demonstrated. Electrical characteristics and mechanical simulations demonstrated the interest of the approach with respect to ultra-low K material integration issues.
International Interconnect Technology Conference, IEEE 2007; 07/2007
-
[show abstract]
[hide abstract]
ABSTRACT: With technological developments towards 22 nm node ICs, integration and process issues will be critical for signal propagation on interconnects. Air gap architecture, as a potential alternative to porous dielectrics, is thus analyzed for two SiO<sub>2</sub> sacrificial approaches. Thanks to electromagnetic and time-domain simulations, extraction of barrier properties and dimensions limits regarding capacitance, delay and crosstalk parameters is realized, leading to the proposal of a specific stack as a global solution to this problematic.
International Interconnect Technology Conference, IEEE 2007; 07/2007
-
V. Arnal,
A. Farcy,
M. Aimadeddine,
V. Jousseaume,
L.G. Gosset,
J. Guillan,
M. Assous,
L. Favennec,
A. Zenasni,
T. David,
K. Hamioud,
L.-L. Chapelon,
N. Jourdan,
T. Vanypre,
T. Mourier,
P. Chausse,
S. Maitrejean,
C. Guedj, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: Integrated circuits are more and more impacted by interconnect performance. As size reaches nanometric dimensions, changes in materials aim at performing a reliable and compliant technology with a maximum capability to reduce delay time and power consumption. At the 32 nm node, k value reduction of existing porous SiOCH and optimization of metallization with thin barrier, conformal seed and plating should mitigate RC and offer an improvement compared to current materials of the 45 nm node.
International Interconnect Technology Conference, IEEE 2007; 07/2007
-
M. Aimadeddine,
V. Jousseaume,
V. Amal,
L. Favennec,
A. Farcy,
A. Zenasni,
M. Assous,
M. Vilmay,
S. Jullian,
P. Maury, [......],
G. Imbert,
Y. LeFriec,
M. Mellier,
H. Chaabouni,
L.L. Chapelon,
K. Hamioud,
F. Volpi,
D. Louis,
G. Passemard, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: An Ultra Low-K (ULK) SiOCH porous dielectric with k=2.3 targeted for the 32 nm node is integrated at local and intermediate levels with the Trench First Hard Mask architecture currently implemented for the 65/45 nm nodes. Physical and electrical characterizations after integration show good barrier integrity, substantial gain in capacitance as well as good via chain functionality. The material exhibits similar interline leakage and breakdown field than the k=2.5 reference dielectric meeting specifications of the 32 nm node.
International Interconnect Technology Conference, IEEE 2007; 07/2007
-
M. Thomas,
A. Farcy,
E. Deloffre,
M. Gros-Jean,
C. Perrot,
D. Benoit,
C. Richard,
P. Caubet,
S. Guillaumet,
R. Pantel,
B. Chenevier, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: MIM capacitors are widely integrated for RF and analog applications. A high density full PEALD TiN/Ta<sub>2</sub>O<sub>5</sub>/TiN capacitor is integrated among copper interconnect following an innovative 3D damascene architecture. The impact of a TaN/Ta layer, introduced to avoid Cu diffusion, on both TiN electrode properties and integrated MIM stack performance is studied. Unexpected lower current was obtained without the barrier layer. As a result, up to 17 fF/mum<sup>2</sup> capacitance densities were achieved with breakdown voltage over 15 V and excellent voltage linearity.
International Interconnect Technology Conference, IEEE 2007; 07/2007
-
[show abstract]
[hide abstract]
ABSTRACT: High frequency characterizations of high-K dielectrics and advanced metal-insulator-metal (MIM) capacitors are presented. This work deals with the impact of process on materials permittivity and the effect of architectures and high-K materials on MIM capacitors electrical performances.
Optoelectronic and Microelectronic Materials and Devices, 2006 Conference on; 01/2007
-
R. Gras,
L.G. Gosset,
E. Petitprez,
V. Girault,
M. Hopstaken,
S. Jullian,
G. Imbert,
Y. Le Friec,
J. Bienacel,
J. Guillan,
T. Chevolleau,
S. Sherman,
M. Tabat,
J. Hautala, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: Basic physical properties as well as electrical and reliability performance of Infusion™ processing were evaluated. This approach, proposed as an alternative to CuSiN and electrolessly deposited Co-alloys, was shown to join the benefits of these two techniques without well-known associated drawbacks. Indeed, it is a uniform process, acting as an efficient Cu diffusion barrier, which does not require specific integration development. Different processes were introduced in a multi-level interconnect stack using ULK/USG stack as IMD, showing excellent electrical properties, and three times electromigration time-to-failure improvement with respect to standard SiCN barrier. However, it was shown that existing process conditions lead to some introduction of N atoms into ULK dielectric, showing there is still some room for process optimization in architectures using un-capped ULKs, to keep the benefits of EM improvement and aggressive effective dielectric constant.
Microelectronic Engineering 01/2007; 84(11):2675-2680. · 1.56 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: Metal-insulator-metal (MIM) capacitors are key components in radio frequency integrated circuits. In this paper, several 0.12 mum-CMOS Cu-Si<sub>3</sub>N<sub>4</sub>-Cu capacitors realized with damascene architecture and whose process allows high-k dielectric compatibility have been designed and characterised from 45 MHz to 40 GHz. Large band equivalent electrical models have been carried out and commented
IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference on; 12/2006
-
S. Chhun,
L.G. Gosset,
W. Besling,
T. Vanypre,
Ph. Brun,
E. Oilier,
M. Mellier,
G. Imbert,
S. Jullian,
A. Margain,
J. Guillan,
R. Gras,
J.-C. Dupuy, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: A hybrid CoWP/SiCN Cu passivation was integrated in a three-metal-level interconnect stack at 65 nm technology node using a porous ULK material (K=2.5). 5 and 20 nm thick Pd-free CoWP electroless barriers were evaluated using a standard trench first hard mask architecture (TFHM) integration scheme, with PVD, ALD or punch-through Ta-based metallization processes. This study evidenced strong interaction between CoWP and etching chemistries, inducing feature size modification. Results evidenced the successful integration of an ultra-thin electroless barrier with slight process tuning, whereas thicker one still requires specific etch process development or integration scheme modification
Interconnect Technology Conference, 2006 International; 07/2006
-
M. Aimadeddine,
V. Arnal,
R. Roy,
A. Farcy,
T. David,
T. Chevolleau,
N. Posseme,
J. Vitiello,
L.L. Chapelon,
C. Guedj,
Y. Brechet,
F. Volpi, J. Torres
[show abstract]
[hide abstract]
ABSTRACT: Patterning and ashing are known to be critical steps to the integration of porous ultra low-k dielectrics in interconnects, mainly due to low-k damage during these processes. In this paper, we investigate the impact of a new methane based ash chemistry on the sidewall modification of the porous dielectric. Physical and electrical characterizations of the integrated low-k evidence a sealing effect of CH<sub>4</sub> plasma on dielectric sidewalls as well as a gain in reliability compared to other known plasma chemistries. The impact of CH <sub>4</sub> chemistry on leakage mechanism is also investigated
Interconnect Technology Conference, 2006 International; 07/2006
-
T. Lacrevaz,
B. Flechet,
A. Farcy, J. Torres,
T.T. Vo,
C. Bermond,
O. Cueto,
E. Defay,
M. Gros-Jean,
B. Blampey,
G. Angenieux,
J. Piquet,
F. de Crecy
[show abstract]
[hide abstract]
ABSTRACT: High permittivity insulators (high-k) are progressively introduced in high-speed integrated passives and devices in order to optimize circuit performances. However, high-k properties are expected to vary with frequency as relaxation and resonance mechanisms occur. It is necessary to analyze and evaluate high-k behaviour from DC to microwave frequency. Real permittivity (K or epsiv'<sub>r</sub>) and losses (eepsiv"<sub>r</sub>) extraction is required over a wide band of frequency to select the most suitable insulator. The proposed method enables the characterization of as deposited thin (down to 60 nm) planar dielectrics integrated below a copper coplanar wave-guide up to 40 GHz. Results of Ta<sub>2</sub>O<sub>5</sub> and STO insulators are presented in this paper
Interconnect Technology Conference, 2006 International; 07/2006
