[Show abstract][Hide abstract] ABSTRACT: A new VME based system has been developed and built at CERN for the servo loops regulating the field in the linac accelerating structure. It makes use of high speed digital IQ detection, digital processing, and digital IQ modulation. The digital processing and IQ modulation is done in a single PLD. The system incorporates continually variable set points, iterative learning, feed forward as well as extensive diagnostics and other features well suited for digital implementations. Built on a single VME card, it will be first used in the energy ramping RF chain of the CERN heavy ion linac (linac 3) and later for upgrading the present proton linac (linac 2). This system serves also as a prototype for the future superconducting proton linac (SPL). The design principle and the experimental results are described.
Particle Accelerator Conference, 2003. PAC 2003. Proceedings of the; 06/2003
[Show abstract][Hide abstract] ABSTRACT: The low level analog cavity control system for Linac 3 has been replaced by a digital solution using Field Programmable Gate Array (FPGA) technology. A single FPGA implements a PI digital controller, digital modulator and demodulator, diagnostics and logging as well as the VME interface. Data is fed to the FPGA from fast on-board ADCs after analog down-converting and filtering. The digital processed output is fed to a fast on-board DAC before analog up-converting, filtering and amplification. This paper discusses all design steps, from modeling of the system to be controlled to design of the controller and implementation in th e FPGA, stressing aspects related to digital signal processing using programmable logic.