C. Nakanishi

Publications (2)0.94 Total impact

• Article: Software pixel interpolation for digital still cameras suitable for a 32-bit MCU

  T. Sakamoto, C. Nakanishi, T. Hase
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  ABSTRACT: This paper discusses the interpolation technique applied to the Bayer primary color method, used frequently as the pixel structure of CCD image sensors for digital still cameras. Eight typical types of interpolation methods are discussed from three viewpoints: the characteristics of the interpolated images, the processing time required to realize their methods based on a 32-bit MCU for embedded applications, and the quality of the resultant images. In terms of reducing the occurrences of pseudocolor and achieving good color restoration, the linear interpolation method taking G's correlation determined by using R/B pixels into consideration was found to be excellent. The measured machine cycle of the interpolation methods was approximately 46 cycles per pixel. Therefore, every method was able to interpolate a VGA-size image in approximately 0.2 seconds with the MCU operating at 60 MHz. In terms of the S/N ratio, a good image quality was obtained through the linear interpolation methods, even with shorter processing time. Based on these results it is concluded that the linear interpolation method, which takes correlation into consideration, is the most suitable for consumer product applications such as digital still cameras
  IEEE Transactions on Consumer Electronics 12/1998; · 0.94 Impact Factor
• Source

  Available from: psu.edu

  Conference Proceeding: Unconstrained speculative execution with predicated state buffering

  H Ando, C. Nakanishi, T Hara, M. Nakaya
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  ABSTRACT: Speculative execution is execution of instructions before it is known whether these instructions should be executed. Compiler-based speculative execution has the potential to achieve both a high instruction per cycle rate and high clock rate. Pure compiler-based approaches, however have greatly limited instruction scheduling due to a limited ability to handle side effects of speculative execution. Significant performance improvement is, thus, difficult in non-numerical applications. This paper proposes a new architectural mechanism, called predicating, which provides unconstrained speculative execution. Predicating removes restrictions which limit the compiler's ability to schedule instructions. Through our hardware support, the compiler is allowed to move instructions past multiple basic block boundaries from any succeeding control path. Predicating buffers the side effects of speculative execution with its predicate, and the buffered predicate efficiently commits or squashes the side effects. The mechanism also provides a speculative exception handling scheme. The scheme, called the future condition properly postpones speculative exceptions and efficiently restarts the process. We show that our mechanism can be implemented through a modest amount of hardware with little complexity. The evaluation results show that our mechanism significantly improves performane, and achieves a 2.45x speedup over scalar machines.
  Computer Architecture, 1995. Proceedings. 22nd Annual International Symposium on; 07/1995