[Show abstract][Hide abstract] ABSTRACT: This work focuses on the mechanisms of alkaline electroless Ni deposition on n-type Si substrates and silicide formation by rapid thermal treatment. The deposited Ni layers were characterized by scanning electron microscopy (SEM), transmission electron microscopy (TEM), energy dispersive x-ray spectroscopy (EDS), and electron energy loss spectroscopy (EELS). The results indicate that Ni deposition occurs in two steps; a nucleation step, dominated by electrochemical processes, followed by autocatalytic deposition of Ni involving the reducing agent NaH2PO2. The oxygen content was found to be uniform in the Ni layer and was higher close to the Si/metal interface. The silicide formation from alkaline Ni deposits was characterized by 4 point probe measurements, in-situ x-ray dispersion (XRD) measurements, and TEM measurements. Results were compared to silicides formed from ‘pure’ sputtered Ni layers. It was observed that the silicide-formation temperature is higher for an electroless Ni layer than that for a sputtered Ni layer. The results suggest that the temperature ramping rate influences crystallographic phase formation.
[Show abstract][Hide abstract] ABSTRACT: Low-cost GaN-on-Si-based transistors are targeted to function at high ambient temperatures. With this perspective, it is aimed to evaluate the high-temperature (HT) capabilities of GaN-on-Si double-heterostructure field-effect transistors. It is highlighted that HT device operation degrades both ON and OFF states that are directly related to the increase in the on-resistance and the decrease in device breakdown voltage; 2-DEG mobility drops with increasing temperature and is responsible for ON-state degradation. Regarding the OFF-state operation, it is observed that at low-voltage operation and with increasing temperature, there is an increase in the OFF-state leakage current because of thermal-assisted electrical conduction across the III-N layers and various interfaces. The main breakdown limiting mechanism at any temperature is, however, buffer leakage along the AlN/Si interface. Because this parasitic conduction, a negative temperature coefficient of breakdown voltage of approximately -1 V/°C is observed. For devices after Si removal, the leakage across the AlN/Si interface is interrupted and therefore HT OFF-state characteristics show high potential to be used at high operating voltage. A breakdown voltage as high as ~1800V is observed after Si removal compared with ~500 V with Si at 150°C.
IEEE Transactions on Electron Devices 01/2013; 60(7):2217-2223. · 2.06 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: ALD processes are very surface sensitive and therefore surface preparation prior to ALD deposition of any passivation layer is a key parameter to control the interface properties of the c-Si/passivation layer. Previous studies on ALD-Al 2 O 3 backside passivation, reported that hydrophilic (-OH) surfaces prior to ALD are preferred over hydrophobic (-H) ones due to the improved nucleation that they generate and to the thermodynamic stability that they bring up . Amongst various hydrophilic cleans, it has recently been demonstrated that HNO 3 based cleans  offer some potential as oxidizing chemistry prior to ALD-Al 2 O 3 deposition for backside passivation of PERC type solar cells. In this work, we demonstrate that HNO 3 based clean can be further improved and that HNO 3 and O 3 based cleans are both potential candidates for surface preparation prior to ALD-Al 2 O 3 deposition, within an industrial PERC type process flow. For both type of cleans, average cell efficiencies up to 19.4% were reported for 60 Ohm/sq emitter and screen printed Ag contacts.
Proceedings of the 27th European Photovoltaic Solar Energy Conference; 09/2012
[Show abstract][Hide abstract] ABSTRACT: This paper presents the development of single step processes and their integration into a baseline for the lab scale manufacturing of high efficiency IBC cells. The main processes evaluated include cleaning, oxidation, boron and phosphorous doping. Three different cleaning treatments, combined with the optimization of thermal oxidation, have been studied. Lifetime values up to 8 ms at an injection level of 1.1015 cm-3 have been achieved on 280 μm, n-Si FZ wafers with a base resistivity of 1.9 Ω.cm. Boron diffusion is evaluated starting from a boron-doped SiOx CVD layer and compared to the diffusion from a BBr3 source. Both doping processes enable J0 values as low as 10 fA/cm2 with a thermal silicon oxide passivation. We present the evolution of the integration runs as a result from the introduction of the improved steps. With the latest improvements, IV characteristics progressed from efficiencies ∼20% up to 23.3% (calibrated IV values: 696 mV, 41.6 mA/cm2, FF= 80.4% with an efficiency of 23.3%).
[Show abstract][Hide abstract] ABSTRACT: In this work three-dimensional (3-D) numerical simulations, validated by the experimental measurements of a reference cell, have been performed to optimize the rear contact geometry of a PERC-type solar cell, featuring a high sheet resistance (140 Ω/sq) phosphorus-doped emitter and a front-side metallization with narrow and highly-conductive electro-plated copper lines (40 μm wide) on lowly resistive Ti contacts. The simulation results show that an optimization of the rear point contact design potentially leads to an efficiency improvement of 0.68%abs compared to the reference cell.
[Show abstract][Hide abstract] ABSTRACT: This work focuses on using copper (Cu) as the main conductor as an alternative to standard screen printed silver (Ag) front contacts for homogeneous emitter silicon solar cells.Two different approaches to form Cu plated contacts based on laser ablation of the SiNx:H antireflection coating (ARC) and subsequent plating steps are presented. In the first approach, contacts are formed by Ni/Cu/Ag plating in an industrial in-line plating tool and subsequent rapid thermal annealing (RTA). In the second approach, the RTA step is performed after sputtering of a thin nickel layer and prior to the final Ni/Cu/Ag plating sequence. Using the latter approach, results are presented on large area 12.5×12.5 cm2p-type CZ-Si PERC-type solar cells featuring an advanced 120 Ω/sq homogeneous emitter and local Al contacts on the rear surface accompanied by a SiOx/SiNx rear side passivation stack. Solar cell efficiencies of up to η=19.6% and average pull tab adhesion results >2 N are reported.
[Show abstract][Hide abstract] ABSTRACT: We report on the first measurement results to obtain over 2 kV breakdown voltage (VBD) of GaN-DHFETs on Si substrates by etching a Si Trench Around Drain contacts (STAD). Similar devices without trenches show VBD of only 650 V. DHFETs fabricated with STAD technology show excellent thermal performance confirmed by electrical measurements and finite element thermal simulations. We observe lower buffer leakage at high temperature (100°C) after STAD compared to devices with Si substrate, enabling high temperature device operation.
2011 International Electron Devices Meeting; 12/2011
[Show abstract][Hide abstract] ABSTRACT: III-Nitride materials are very promising to be used in next-generation high-frequency power switching applications. In this letter, we demonstrate the performance of normally off AlGaN/GaN/AlGaN double-heterostructure FETs (DHFETs) using a boost-converter circuit. The figures of merit of our large (57.6-mm gate width) GaN transistor are presented: R <sub>ON</sub> * Q <sub>G</sub> of 2.5 Ω·nC is obtained at V <sub>DS</sub> = 140 V. The switching performance of the GaN DHFET is studied in a dedicated high-frequency boost converter: both the switching times and power losses are characterized. We show converter efficiency values up to 96.1% at 500 kHz and 93.9% at 850 kHz at output power of 100 W.
IEEE Electron Device Letters 11/2011; · 2.79 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: In this work, the degradation of a GaN power amplifier (PA) integrated in a thin film multi-chip module (MCM-D) interconnect technology is investigated by means of DC and RF measurements. Failure analysis has demonstrated that improper thermal contact may cause the PA module performance degradation. Moreover, we have experimentally studied the thermal effects on the RF performance of MCM-D and low-temperature co-fired ceramic (LTCC) PAs. It shows that the device exhibits a higher output power density on a thinned MCM-D substrate than on an LTCC substrate with thermal vias, and also that the output power density can be further improved by reducing the heat spread distance between active devices and heat sink.
[Show abstract][Hide abstract] ABSTRACT: In this paper, we investigate laser ablation of aluminum oxide (AlOx) layers and AlOx/SiNx stacks. This laser ablation process is studied in order to be implemented in back side passivation ablation in PERC-type cell process flow. The objective of this work is to define laser conditions for selectively and locally ablating the layers and reducing the laser-induced damages in the Si and in the passivation layer. In addition, different laser ablation patterns have been tested in order to determine the best ablation conditions to reach high efficiency PERC-type cells. Different laser sources and parameters (pulse duration, wavelength, power...) were tested in order to ablate these layers. The quality of the openings was characterized by optical and electronic microscopies and the laser-induced damages were evaluated by QSSPC-calibrated lifetime mapping. Based on this characterization method, we have processed PERC-type cells with AlOx/SiNx back side passivation with different laser ablation patterns. This work allowed us to determine suitable laser conditions and ablation patterns for reaching higher efficiency for AlOx-backside passivated PERC-type cells.
Proceedings of the 37th IEEE Photovoltaic Specialists Conference; 06/2011
[Show abstract][Hide abstract] ABSTRACT: In this letter, we present a local substrate removal technology (under the source-to-drain region), reminiscent of through-silicon vias and report on the highest ever achieved breakdown voltage (V<sub>BD</sub>) of AlGaN/GaN/AlGaN double heterostructure FETs on a Si (111) substrate with only 2-μm-thick AlGaN buffer. Before local Si removal, V<sub>BD</sub> saturates at ~700 V at a gate-drain distance (L<sub>GD</sub>) ≥ 8 μm. However, after etching away the substrate locally, we measure a record V<sub>BD</sub> of 2200 V for the devices with L<sub>GD</sub> = 20 μm. Moreover, from Hall measurements, we conclude that the local substrate removal integration approach has no impact on the 2-D electron gas channel properties.
IEEE Electron Device Letters 02/2011; · 2.79 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: We demonstrate a novel field-effect saccharide sensor device using an AlGaN/GaN heterostructure functionalized with a chemical receptor, featuring a thiol group, alkane chain linker and a simple boronic acid. Fabricated devices were demonstrated to electronically detect buffered saccharide solutions (fructose, galactose and glucose) of varying concentrations. These results provide proof-of-concept for the development AlGaN/GaN-based sensor devices incorporating boronic acid receptor chemistry.
Sensors and Actuators B Chemical 01/2011; 160(1):1078-1081. · 3.84 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: We investigated the limitations of the field plate (FP) effect on breakdown voltage V <sub>BD</sub> that is due to the silicon substrate in AlGaN/GaN/AlGaN double heterostructures field-effect transistors. In our previous work, we showed that in devices with large gate-drain distance (L<sub>GD</sub> > 8 μm), the breakdown voltage does not linearly increase with L <sub>GD</sub> because of a double leakage path between the silicon substrate and the metal contacts, which makes the device break at the silicon interface. In this paper, we showed that the effect of the FP for such large L <sub>GD</sub> is not significant because the breakdown is still dominated by the silicon substrate. The increase in V <sub>BD</sub> due to the FP is significant only for devices with small gate-drain distances ( L <sub>GD</sub> <; 8 μm). Indeed we show that for such small L <sub>GD</sub> the increase in the breakdown voltage is more than double, whereas for larger L <sub>GD</sub>, this is only about 10%. Simulations of AlGaN/GaN/AlGaN devices for small L <sub>GD</sub> are carried out with different FP lengths and passivation thickness in order to study the electric field distribution.
IEEE Transactions on Electron Devices 01/2011; · 2.06 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: Lasers as production tools offer several advantages, which are especially relevant for the production of solar cells. The contact-less and localized nature of the energy deposition allows new processes, such as laser selective emitter doping, laser ablation of dielectric coatings and via drilling for back contact cell concepts. A highly critical factor is the correct selection of laser parameters and thus laser sources in a manner that adapts the laser process to the requirements of the material, the process nature and the solar cell properties. In this paper the influence of the pulse duration in the range from hundreds of femtoseconds to ten picoseconds on the selective ablation of silicon nitride from multi-crytsalline solar cells is investigated. For this process it is critical to avoid damage to the sensitive emitter and ultra-short laser sources have the potential to enable this process.
[Show abstract][Hide abstract] ABSTRACT: Interdigitated back-contact solar cells for high efficiency applications are usually manufactured in R&D laboratories by multiple subsequent lithography steps. Here the patterning by litho-free steps is proposed and implemented. The current status of the small area (2×2cm2 and 4×4cm2) n-type IBC solar cells integration flow is presented with exclusively laser-based patterning scheme: emitter, metal point contacts and electrode separation. Electrode separation is performed in 2 typical configurations: above emitter region or BSF region, where the 2nd location proofs to be beneficial. The best Suns Voc reaches up to 647 mV and p-FF up to 83%.
[Show abstract][Hide abstract] ABSTRACT: In this paper, the possibility to achieve output power density exceeding 10 W/mm at 2 GHz using 1 mm gate width GaN HEMTs on 4” large diameter Si (111) substrate is demonstrated for the first time. Additionally, storage tests at 325°C reveal the high thermal stability of these devices which we attribute to the in-situ grown SiN cap layer. These data are a first step towards a cost-effective high RF power density for high reliability GaN-on-Si HEMT technology.
[Show abstract][Hide abstract] ABSTRACT: A boost converter was constructed using a high voltage enhancement mode (E-mode) AlGaN/GaN/AlGaN DHFET transistor grown on Si<;111>. The very low dynamic onresistance (R<sub>dyn</sub> ≈ 0.23 Ω) and very low gate-charges (e.g. Q<sub>gate</sub> ~15 nC at Vos = 200 V) result in minor transistor losses. Together with a proper design of the passive components and the use of SiC diodes, very high overall efficiencies are reached. Measurements show high conversion efficiencies of 96.1% (P<sub>out</sub> = 106 W, 76 to 142 V at 512.5 kHz) and 93.9% (P<sub>out</sub> = 97.5 W, 78 to 142 V at 845.2 kHz). These are, to our knowledge, the highest efficiencies reported for an enhancement mode GaN DHFET on Si in this frequency range. The transistor switching losses are concentrated in the turn-on interval, and dominate at high frequencies. This is due to a limited positive gate-voltage swing, as the gate-source diode restricts the positive drive voltage.
Energy Conversion Congress and Exposition (ECCE), 2010 IEEE; 10/2010