J.P. Dom

Technische Universiteit Delft, Delft, South Holland, Netherlands

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Publications (30)15.59 Total impact

  • Article: Thermoreflectance optical test probe for the measurement of current‐induced temperature changes in microelectronic components
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    ABSTRACT: We have developed an optical laser probe for the measurement of absolute surface temperature changes in integrated circuits. The experimental method is based upon thermoreflectance, which is the change in reflectance due to surface temperature changes of the device. A laser beam is focused upon a small spot of an operating circuit. The reflected intensity is recorded upon a photodiode in synchronism with the circuit periodic excitation signal. We calibrated the device by developing a simple analytical model to calculate the surface temperature behaviour of a silicon resistive structure we tested. The value we derived for the relative reflectance temperature coefficient of silicon is in excellent agreement with the value from the literature. The results show the laser probe to be a fast surface thermometer (DC to 10 MHz), with excellent lateral resolution (1 μm), with high sensitivity (10−3°C) and large dynamics (ΔT: 102 to 10−3°C).
    Quality and Reliability Engineering 03/2007; 9(4):303 - 308. · 0.70 Impact Factor
  • Article: Localization and characterization of latch‐up sensitive areas using a laser beam: Influence on design rules of ICs in CMOS technology
    P. Fouillat, Y. Danto, J. P. Dom
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    ABSTRACT: The technique of ‘scanning’ with a laser beam permits a localization of latch-up sites in CMOS technology with a resolution less than one micron. Electrical simulations correlated to experimental curves of ‘supply current’ versus ‘photo-induced current’ offer a good evaluation of the predominant parameters of the parasitic structure.
    Quality and Reliability Engineering 03/2007; 9(6):477 - 482. · 0.70 Impact Factor
  • Article: Asics failure analysis using two complementary techniques: External electrical testing and internal contactless laser beam testing
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    ABSTRACT: Functional tests with an electrical tester have revealed defects in an ASIC. Results analysis leads to incriminating different areas of the layout. A laser beam tester localizes the logic operator responsible for the dysfunction observed with the electrical tester.
    Quality and Reliability Engineering 01/2007; 8(3):213 - 217. · 0.70 Impact Factor
  • Article: A New Current-Mode Synthesis Method for Dynamic Translinear Filters and its Applications in Hearing Instruments
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    ABSTRACT: A new current mode synthesis method for dynamic translinear filters is proposed. As a design example, we have considered an ultra-low power second order filter working in audio frequency range, for hearing aids application, and using subthreshold MOS devices. It has a nominal supply voltage of 1.2 V and works down to 1 Volt. It has a power consumption of 5 W. The filter cut-off frequency and its Q factor can be tuned respectively from 600 Hz to 13 kHz and from 0.6 to 1.1. Mismatch problems are investigated on the circuit level and an on-chip compensation method is proposed.
    Analog Integrated Circuits and Signal Processing 02/2000; 22(2):221-229. · 0.59 Impact Factor
  • Conference Proceeding: A 1–Volt 300 MHz fully integrated oscillator
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    ABSTRACT: An ultra-low voltage relaxation oscillator providing output frequency up to 300 MHz is presented. Theoretical calculations as well as experimental measurements are discussed. A tuning range extending from a few megahertz to 305 MHz while consuming less than 1.4 mA has been measured on a 0.8 µm BiCMOS prototype. This circuit yields a phase noise of -78.5 dBc/Hz, a 500 ppm/mV sensitivity to power supply variation and a -600 ppm/°C temperature dependency.
    Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European; 10/1998
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    Conference Proceeding: A new current mode synthesis method for dynamic translinear filters and its application in hearing aids
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    ABSTRACT: A new current mode synthesis method for dynamic translinear filters is proposed. As a design example, we have considered an ultra-low power second order filter working in audio frequency range, for hearing aids application, and using subthreshold MOS devices. It has a nominal supply voltage of 1.2 V and works down to 1 V. The total power consumption is about 5 μW. The filter cut-off frequency and its Q factor can be tuned respectively from 600 Hz to 13 kHz and from 0.6 to 1.1. Mismatch problems are investigated on the circuit level and an on-chip compensation method is proposed
    Electronics, Circuits and Systems, 1998 IEEE International Conference on; 02/1998
  • Conference Proceeding: On-line CMOS BICS: an experimental study
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    ABSTRACT: A CMOS built-in current sensor is proposed. It is dedicated to mixed signal circuits power supply current monitoring. It takes advantage of a parasitic resistor, so its implementation is very transparent. Measurement results of a manufactured test chip highlight the behaviors of the sensor in terms of linearity, speed and noise
    IDDQ Testing, 1997. Digest of Papers., IEEE International Workshop on; 12/1997
  • Conference Proceeding: 1-V low-noise 200 MHz relaxation oscillator
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    ABSTRACT: This paper presents a high-frequency current-controlled relaxation oscillator designed for ultra-low voltage supply (0.9 V). The choosen relaxation oscillator topology provides both high frequency and low noise characteristic. Simulated results are verified by measurements on a full-custom integrated circuit. The tuning range extends from 1 to 180 MHz with supply current limited to 1.1 mA. At a 200 kHz off set from the oscillator frequency, the measured phase noise is-89 dBc/Hz.
    Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European; 10/1997
  • Conference Proceeding: A low voltage and low power voltage/frequency converter with automatic offset compensation for biomedical telemetry
    M. Zhang, J.P. Dom
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    ABSTRACT: In this article, a voltage/frequency converter with dynamic offset trimming is presented. This converter is simple in structure, good in accuracy and low in power consumption. It is realized in a 1.2 μ BiCMOS technology. The result of test shows that an offset reduction as smaller as 600 μV can be obtained
    Analog and Mixed IC Design, 1997. Proceedings., 1997 2nd IEEE-CAS Region 8 Workshop on; 10/1997
  • Conference Proceeding: Design, integration and characterization of analog integratedcircuits: a complete design flow dedicated to microelectronics education
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    ABSTRACT: Teaching analog electronics leads us to set up a complete analog integrated circuit design flow to allow students to detail the main aspects of designer's tasks. In our case we propose the following design flow: circuit design and simulation, circuit integration by customizing prediffused array, die bonding and testing of the final circuit. All these steps require classical equipment except customizing the array which is made by a laser beam direct writing system
    Microelectronic Systems Education, 1997. MSE '97. Proceedings., 1997 IEEE International Conference on; 08/1997
  • Conference Proceeding: 1-volt ratiometric temperature stable current reference
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    ABSTRACT: This paper presents a current reference achieving excellent behavior with regards to its temperature stability, which is able to operate under ultra-low voltage supply conditions (down to 0.9 V). Simulated results are verified by measurements on a full-custom integrated circuit. The latter includes current reference of roughly 42 μA, and measurement depicts a temperature coefficient (TC) down to 120 ppm/°C without any adjustment, upon the military range. Due to the ratiometric property, this reference is highly reproducible. In addition, this current reference was designed to be power supply independent
    Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on; 07/1997
  • Conference Proceeding: Accurate analog VLSI model of calcium-dependent bursting neurons
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    ABSTRACT: Our paper deals with an electronic full-custom circuit designed to accurately model the calcium dependence function of biological neurons. This ASIC is one in a set of modules dedicated for the analog modeling of neural networks and more specifically their use in real-time running hybrid experiments. Measurements and behaviors of modeled neurons are presented in various configurations and compared with theoretical predictions
    Neural Networks,1997., International Conference on; 07/1997
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    Conference Proceeding: Practical supergrain head sized arrays
    D. Masmoudi, D. Dallet, J.P. Dom
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    ABSTRACT: This paper carried out a new design of head sized sensor arrays with a simple delay-and-sum beamforming which provides useful amounts of directivity index with sufficient robustness to errors. A frequency-independent sidelobe reduction is proposed to achieve optimal frequency characteristics. In order to obtain this control, a principle of combining multiple level of array structures is established. Results are presented for spherically isotropic noise. It is found that good performance can be obtained for a head sized array by combining multiple level structures with simple delay and sum beamformer
    Acoustics, Speech, and Signal Processing, 1997. ICASSP-97., 1997 IEEE International Conference on; 05/1997 · 4.63 Impact Factor
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    Article: Converters dedicated to long-term monitoring of strain gauge transducers
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    ABSTRACT: This paper presents two new strain gauge bridge-to-pulse position modulation (PPM) converters. They have been developed in 2-μm BiCMOS technology. The first one uses a chopper amplifier and a voltage-to-time converter associated in a feedback loop. This topology mainly exhibits an automatic offset cancellation capability, a ratiometric transfer function, and 10-b accuracy. The second one is a voltage-to-frequency converter using the switched-capacitor (SC) technique. It is an optimized version in terms of size minimization and noise rejection. Furthermore, a special RF transmitter has been designed in order to send the data from an intracorporal sensing and conditioning circuitry to an external computer dedicated to data analysis. Moreover, these converters are insensitive to offset drifts and are well suited for long term monitoring of orthopedic implants used for the treatment of bone fractures
    IEEE Journal of Solid-State Circuits 04/1997; · 3.23 Impact Factor
  • Article: 3.3 V CMOS built-in current sensor
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    ABSTRACT: A CMOS built-in current sensor dedicated to power supply current monitoring is proposed, which takes advantage of the parasitic resistor attached to an interconnection layer. Simulation results highlight the behaviour of the sensor in terms of speed, linearity and noise. Process dependencies are taken into account
    Electronics Letters 03/1997; · 0.96 Impact Factor
  • Conference Proceeding: On chip I<sub>DDX</sub> sensor
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    ABSTRACT: The aim is the design of an I<sub>DDX</sub> sensor integrated within the Circuit Under Test (CUT). Its function is transparent because its power consumption does not affect the behaviour of the CUT. This transducer is fast, accurate, linear and small for its possible duplication in the CUT. It does not need a specific power supply, and this power supply should be cut to inhibit the I<sub>DD</sub> function whenever the CUT is in normal use. In response to a Heaveside signal, a rise time lower than 1 ns was chosen. The desired I<sub>DD</sub> range is 0 to 10 mA. This work is not a new approach of fault detection but shows the application of new means for static and dynamic measurements of I<sub>DD</sub>
    IDDQ Testing, 1996., IEEE International Workshop on; 11/1996
  • Article: Numerical modelling of mechanisms involved in latchup triggering by a laser beam
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    ABSTRACT: The use of a laser beam is a well-known technique to trigger latchup parasitic structures in ICs. Numerical analyses of this phenomenon are brought into play to study its sensitivity when a continuous wave laser as well as pulsed lasers are used. The impact location is also studied to demonstrate that different mechanisms are involved in the triggering phase of latchup. The structure is more sensitive to blue light when it is directed over the well-substrate junction, while it is more sensitive to infrared light elsewhere. When using a CW laser, curves giving the power supply current versus the photo-induced current provide direct information on the parameters of the parasitic structure
    IEEE Transactions on Nuclear Science 07/1996; · 1.45 Impact Factor
  • Conference Proceeding: An intracorporal telemetry for strain gage transducer
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    ABSTRACT: A new strain gage bridge to PPM (Pulse Position Modulation) converter has been developed. It consists of a chopper amplifier and a voltage to time converter associated in a feed-back loop. This topology exhibits mainly an automatic offset cancellation capability, a ratiometric transfer function and an accuracy of 10 bits. Therefore, this converter is insensitive to offset drifts, and is well suited for long term monitoring of orthopedic implants
    Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996; 06/1996
  • Conference Proceeding: A new approach to determine active doping profiles of bipolar transistors using electrical measurements and a physical device simulator
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    ABSTRACT: This paper describes a new methodology to extract active doping profiles in a bipolar technological process. Simulated device characteristics coming from a physical simulator are matched to electrical measurements following a straightforward procedure. The influence of doping profile models, physical and statistical models and how to drive convenient experiments on the device under test is discussed
    Microelectronic Test Structures, 1996. ICMTS 1996. Proceedings. 1996 IEEE International Conference on; 04/1996
  • Conference Proceeding: A BiCMOS implementation of the Hodgkin-Huxley formalism
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    ABSTRACT: This paper presents an analog design of a biologically inspired neuron model: the conductance-based Hodgkin-Huxley formalism. After a description of the model equations set, the corresponding subcircuits are detailed. ASICs were fabricated in a 2 μm BiCMOS technology, and have a block structure allowing the constitution of complex cells or small networks. As an application, numerical and analog computations of the action potentials are compared, and the effects of some model parameters modifications are shown
    Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on; 03/1996