H. Iwai

NIMS Medicity, Neyattinkara, Kerala, India

Are you H. Iwai?

Claim your profile

Publications (351)274.77 Total impact

  • [Show abstract] [Hide abstract]
    ABSTRACT: Bipolar resistive switching characteristics of CeOx layer on Si-based bottom electrodes (BE) are presented. Owing to the formation and the presence of a thin SiO2 interfacial layer (SiO2-IL) between the CeOx layer and BE, the set process is triggered by a local breakdown at the thin SiO2-IL due to large differences in dielectric constants. Reset process, on the other hand, is obtained by local anodic oxidation to the breakdown spots by the high oxygen ion conductivity of the CeOx layer. High insulating properties of SiO2-IL enables obtaining a resistance ratio of over 105 at high-resistive-state to low-resistive-state. A model to explain the resistance ratio has been proposed using initial trap density of SiO2-IL. Moreover, forming-free feature can be achieved with NiSi2 BE.
    Semiconductor Science and Technology 10/2014; 29(11):115030. · 1.92 Impact Factor
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: The photothermal conversion of CO2 provides a straightforward and effective method for the highly efficient production of solar fuels with high solar-light utilization efficiency. This is due to several crucial features of the Group VIII nanocatalysts, including effective energy utilization over the whole range of the solar spectrum, excellent photothermal performance, and unique activation abilities. Photothermal CO2 reaction rates (mol h−1 g−1) that are several orders of magnitude larger than those obtained with photocatalytic methods (μmol h−1 g−1) were thus achieved. It is proposed that the overall water-based CO2 conversion process can be achieved by combining light-driven H2 production from water and photothermal CO2 conversion with H2. More generally, this work suggests that traditional catalysts that are characterized by intense photoabsorption will find new applications in photo-induced green-chemistry processes.
    Angewandte Chemie International Edition 07/2014; · 11.34 Impact Factor
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: The photothermal conversion of CO2 provides a straightforward and effective method for the highly efficient production of solar fuels with high solar-light utilization efficiency. This is due to several crucial features of the Group VIII nanocatalysts, including effective energy utilization over the whole range of the solar spectrum, excellent photothermal performance, and unique activation abilities. Photothermal CO2 reaction rates (mol h−1 g−1) that are several orders of magnitude larger than those obtained with photocatalytic methods (μmol h−1 g−1) were thus achieved. It is proposed that the overall water-based CO2 conversion process can be achieved by combining light-driven H2 production from water and photothermal CO2 conversion with H2. More generally, this work suggests that traditional catalysts that are characterized by intense photoabsorption will find new applications in photo-induced green-chemistry processes.
    Angewandte Chemie 07/2014;
  • [Show abstract] [Hide abstract]
    ABSTRACT: The thermopowers of single-crystalline anilinium tetrathiafulvalene-2-carboxylate (TTFCOONH3Ph) and its deuteriated form (TTFCOOND3Ph) have been examined at room temperature, and a significant isotope effect was found: 102 μV/K for TTFCOONH3Ph, and 48 μV/K for TTFCOOND3Ph, which amounts to a difference of a factor of around two. The origin of the difference, for example, X-ray crystal structure and doping level, was examined based on chemical and physical characterizations, and it was found that very low ion transport drastically enhances the thermopower of holes, giving rise to the large isotope effect.
    Berichte der deutschen chemischen Gesellschaft 05/2014; · 2.94 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: Although several high-k insulators have been deposited on the diamond for metal-insulator-semiconductor field effect transistors (MISFETs) fabrication, the k values and current output are still not fully satisfactory. Here, we present a high-k ZrO2 layer on the diamond for the MISFETs. The k value for ZrO2 is determined by capacitance-voltage characteristic to be 15.4. The leakage current density is smaller than 4.8 × 10(-5) A·cm(-2) for the gate voltage ranging from -4.0 to 2.0 V. The low on-resistance MISFET is obtained by eliminating source/drain-channel interspaces, which shows a large current output and a high extrinsic transconductance. The high-performance diamond MISFET fabrication will push forward the development of power devices.
    Scientific reports. 01/2014; 4:6395.
  • [Show abstract] [Hide abstract]
    ABSTRACT: We investigate Si/0.85Ge0.15 fully depleted-SOI tunnel FET (TFET) devices operated in the electron-hole bilayer (EHB) mode. The application of negative bias on front gate and positive bias on back gate results in confined hole and electron layers that are expected to enable vertical band-to-band tunneling (BTBT). The idea of the EHB-TFET device is to enhance the tunneling current by expanding the BTBT generation area from the narrow lateral source/channel junction to the entire channel region. Our systematic measurements on a variety of TFETs with variable geometry and channel materials do not offer support to this attractive concept. Self-consistent simulations confirm that the vertical BTBT transitions do not produce an appreciable current in our devices, due to size-and bias-induced quantization, effective mass anisotropy, and incomplete formation of the bilayer. We examine the conditions for efficient vertical BTBT to occur and show that they cannot be met simultaneously, at least in Si or Si/SiGe devices.
    IEEE Transactions on Electron Devices 01/2014; 61(8):2674-2681. · 2.06 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, a detailed 3-D numerical analysis is carried out to study and evaluate CMOS logic device and circuit performance of gate-all-around (GAA) Si nanowire (NW) field-effect transistors (FETs) operating in sub-22-nm CMOS technologies. Employing a coupled drift-diffusion room temperature carrier transport formulation, with 2-D quantum confinement effects, we numerically simulate Si GAA NWFET electrical characteristics. The simulation predictions, on the device performance, short channel effects, and their dependence on NW geometry scaling, are in good agreement with the Si NWFET experimental data reported in literature. Superior electrostatic integrity, OFF-state device performance, lower circuit delays, and faster switching in the Si GAA NWFET-based CMOS circuits are numerically demonstrated in comparison with an Si-on-insulator FinFET. The mixed-mode numerical simulations also predict low supply voltage operations for the Si NWFET-based logic circuits.
    IEEE Transactions on Electron Devices 01/2014; 61(9):3066-3074. · 2.06 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: Interface properties of La-silicate gate dielectrics on Si substrates with W or nano-sized grain W2C gate electrodes have been investigated. A low interface state density of 2.5 × 1011 cm−2/eV has been achieved with W2C gate electrodes, which is one third of those with W gate electrode. An interface roughness of 0.33 nm with spatial frequency comparable to the grain size of W gate electrode has been observed. Besides, an atomically flat interface of 0.12 nm has been obtained with W2C gate electrode. The origin of flat interface may be attributed to the elimination of inhomogeneous stress by grains in metal electrode.
    Applied Physics Letters 01/2014; 104(2):021601-021601-4. · 3.79 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: It was found that the electrical properties of CeO2/La2O3 stack are much better than a single layer La2O3 film. A thin CeO2 capping layer can effectively suppress the oxygen vacancy formation in the La2O3 film. This work further investigates the current conduction mechanisms of the CeO2 (1 nm thick)/La2O3 (4 nm thick) stack. Results show that this thin stacked dielectric film still has a large leakage current density; the typical 1−V leakage can exceed 1 mA/cm2 at room temperature. The large leakage current should be due to both the oxide defect centers as well as the film structure. Results show that at low electric field (<0.2 MV/cm), the thermionic emission induced current conduction in this stacked structure is quite pronounced as a result of interface barrier lowering due to the capping CeO2 film which has a higher k value than that of the La2O3 film. At higher electric fields, the current conduction is governed by Poole–Frenkel (PF) emission via defect centers with an effective energy level of 0.119 eV. The temperature dependent current–voltage characteristics further indicate that the dielectric defects may be regenerated as a result of the change of the thermal equilibrium of the redox reaction in CeO2 film at high temperature and the drift of oxygen under the applied electric field.
    Microelectronics Reliability 01/2014; · 1.14 Impact Factor
  • Diamond and Related Materials 09/2013; · 1.71 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: In order to search a gate dielectric with high permittivity on hydrogenated-diamond (H-diamond), LaAlO3 films with thin Al2O3 buffer layers are fabricated on the H-diamond epilayers by sputtering-deposition (SD) and atomic layer deposition (ALD) techniques, respectively. Interfacial band configuration and electrical properties of the SD-LaAlO3/ALD-Al2O3/H-diamond metal-oxide-semiconductor field effect transistors (MOSFETs) with gate lengths of 10, 20, and 30 μm have been investigated. The valence and conduction band offsets of the SD-LaAlO3/ALD-Al2O3 structure are measured by X-ray photoelectron spectroscopy to be 1.1 ± 0.2 and 1.6 ± 0.2 eV, respectively. The valence band discontinuity between H-diamond and LaAlO3 is evaluated to be 4.0 ± 0.2 eV, showing that the MOS structure acts as the gate which controls a hole carrier density. The leakage current density of the SD-LaAlO3/ALD-Al2O3/H-diamond MOS diode is smaller than 10−8 A cm−2 at gate bias from −4 to 2 V. The capacitance-voltage curve in the depletion mode shows sharp dependence, small flat band voltage, and small hysteresis shift, which implies low positive and trapped charge densities. The MOSFETs show p-type channel and complete normally off characteristics with threshold voltages changing from −3.6 ± 0.1 to −5.0 ± 0.1 V dependent on the gate length. The drain current maximum and the extrinsic transconductance of the MOSFET with gate length of 10 μm are −7.5 mA mm−1 and 2.3 ± 0.1 mS mm−1, respectively. The enhancement mode SD-LaAlO3/ALD-Al2O3/H-diamond MOSFET is concluded to be suitable for the applications of high power and high frequency electrical devices.
    Journal of Applied Physics 08/2013; 114(8). · 2.21 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: TTFCOONH3Ph is a recently synthesized open-shell ionic semiconductor, the electronic state of which differs from that of typical organic closed-shell semiconductors. Magnetotransport properties were examined using a single-crystal sample, and found to exhibit small negative magnetoresistance (∼0.2%) for 9 T at room temperature (rt). The magnetization curve verifies the existence of a ferromagnetic (35%) and a paramagnetic (65%) component at rt, which is very similar to that of diluted magnetic semiconductors, despite the absence of any ferromagnetic metal elements. Electron spin resonance reveals weak localization of paramagnetic molecular spins, and moreover, ferromagnetic resonance confirms the existence of magnetically ordered spins in addition to the paramagnetic ones. The origin of the spin-polarized transport is discussed.
    Solid State Communications 07/2013; 165:27–32. · 1.53 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: We report an experimental study of the carrier transport in [1 1 0]-oriented long channel tri-gate (TG) and omega-gate (ΩG) silicon nanowire (SiNW) transistors cross-section down to 11 nm × 10 nm. Electron and hole mobilities have been measured down to 20 K to evaluate the contribution from the dominant scattering mechanisms. We have studied and discussed the influence of channel shape, channel width and strain effect on carrier mobility. In particular, we have shown that the transport properties are mainly driven by the relative contribution of the different inversion surfaces, without noticeable differences between TG and ΩGNWs. We have also demonstrated the effectiveness of an additional uniaxial tensile strain in NMOS NWs down to 10 nm width.
    Solid-State Electronics 06/2013; 84:46–52. · 1.48 Impact Factor
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Target factor analysis (TFA) of a series of angle-resolved reflection electron energy loss spectra (REELS) was recently demonstrated to be a useful method to determine bulk energy loss functions (ELFs), which by the TFA are separated from the surface-loss structures of REELS. The dielectric function is then readily derived by Kramers–Kronig analysis of the ELF. The advantage of the method compared with other methods, which are also based on the analysis of REELS, is that the condition of the outermost surface region is unimportant because the excitations that occur there are removed by the TFA and ideally a pure bulk component is determined. Our method is thus particularly useful for determining the ELF from compound materials that are hard to clean without modifying the outermost atomic layers. In this paper, the robustness of the method was studied by applying it to three GaAs samples with different surface compositions caused by different surface cleaning methods. The results showed that when electrons of energy 3000–4500 eV were used, the resulting bulk ELFs were essentially identical except for small differences for the sample that had the largest thickness of the modified surface layer. It is concluded that this is a useful method, provided that the thickness of the modified layer is kept to a minimum by using shallow angle sputtering and by using REELS electrons at a sufficiently high energy that a major part of the electron trajectories are at a depth larger than the thickness of the modified surface layer. Copyright © 2013 John Wiley & Sons, Ltd.
    Surface and Interface Analysis 06/2013; 45(6). · 1.39 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: This study reports on the electrical characteristics of (1 1 0)-oriented nMOSFETs with a direct contact La-silicate/Si interface structure and the detailed comparison with (1 0 0)-oriented nMOSFETs. Precise control of oxygen partial pressure can provide the scaled EOT down to 0.73 nm on (1 1 0) orientation in common with (1 0 0) orientation. No frequency dispersion in Cgc–V characteristic for (1 1 0)-oriented nMOSFETs is successfully demonstrated at scaled EOT region, while higher amount of available bonds on (1 1 0) surface results in a larger interface state density, leading to the degradation of sub-threshold slope. High breakdown voltages of 2.85 V and 2.9 V for (1 0 0)- and (1 1 0)-oriented nMOSFETs are considered to be due to superior interfacial property. The electron mobility on (1 1 0) orientation is lower than that on (1 0 0) orientation because of the smaller energy split between fourfold valleys and twofold valleys as well as the larger density of states for lower-energy valleys in the (1 1 0) surface. Moreover, electron mobility is reduced with decreasing EOT in both (1 0 0)- and (1 1 0)-oriented nMOSFETs. It is found that threshold voltage instability by positive bias stress is mainly responsible for bulk trapping of electron even with a larger interface state density in (1 1 0) orientation and influence of surface orientation on threshold voltage instability is negligibly small.
    Solid-State Electronics 06/2013; 84:53–57. · 1.48 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: Effect of W and TiN/W gate metal on the interface quality of La2O3/InGaAs metal–oxide-semiconductor (MOS) interface is investigated. Hard X-ray photoelectron spectroscopy revealed that gate metal greatly affects the oxidation states at La2O3/InGaAs interface after post-metallization annealing (PMA). Results demonstrate that TiN/W gate metal can effectively control the reaction at La2O3/InGaAs interface and also suppress the formation of As, Ga, and In oxides. As a result, superior capacitance–voltage (C–V) characteristics with low interface state density (Dit) of 4.6 × 1011 cm−2/eV (∼0.1 eV from midgap) and leakage current below 10−5 A/cm2 was obtained for TiN/W/La2O3 (10 nm)/InGaAs MOS capacitors. The MOS structure integrity was preserved for annealing temperature up to 620 °C.
    Solid-State Electronics 04/2013; 82:29–33. · 1.48 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: It is shown in this work that the presence of an ultrathin (~ 1.5 nm) SiO2 interfacial layer reactively formed in between a thick (~ 20 nm) high-permittivity CeOx film and a metal NiSi2 bottom electrode in a metal–insulator–metal structure has remarkable consequences for the hysteretic current–voltage (I–V) characteristic of the device. Conductance values in the low resistance state (LRS) close to integer and half-integer values of the quantum conductance unit G0 = 2e2 / h, where e is the electron charge and h the Planck constant, reveal the formation of filamentary structures across the stack with bottlenecks of atomic dimensions. Even though the hysteretic behavior partially remains when the bottom electrode (Ti, TiN, or W) is changed, the LRS I–V no longer exhibits so well defined conductance levels as in the NiSi2 case. This distinctive behavior is attributed to the presence of the SiO2 switching layer. Supplementary post-breakdown I–V data obtained from Al/SiO2/Si capacitors supports this hypothesis.
    Thin Solid Films 04/2013; 533:38–42. · 1.87 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: The physical and electrical properties of Ni silicides, reactively formed by a thin Ni layer of 3 nm, have been investigated. The existence of NiSi2 phase has been confirmed at low temperature annealing by x-ray photoelectron spectroscopy. The silicides have shown flat surfaces up to an annealing temperature of 800 °C and a stable sheet resistance can be achieved. The Schottky barrier heights extracted from diode characteristics have shown stable values against annealing temperature owing to the stability of the film with an ideality factor nearly to unit.
    Journal of Physics Conference Series 03/2013; 417(1):2015-.
  • [Show abstract] [Hide abstract]
    ABSTRACT: A sputtering process using multi-stacking of carbon and metal thin films with subsequent annealing process to reactively form metal carbides (TiC, TaC, and W2C) has been presented. Grain sizes of the carbides are as small as 3.9, 3.2, and 1.9 nm for TiC, TaC, and W2C, respectively. Work functions of TiC, TaC, and W2C layers have been extracted as 4.3, 4.7, and 4.9 eV, respectively, relatively high values due to oriented growth. W2C layer formed by the presented process gives high potential to form carbides with nano-sized grain and high work function for gate electrode application.
    Applied Physics Letters 01/2013; 103(11):111908-111908-3. · 3.79 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: A simple analytic model for the post-breakdown conduction characteristics in W/La2O3/p-type Si MOSFETs is reported. The model is based on the solution of the generalized diode equation and captures the behavior of the gate current (IG) as a function of the gate (VG) and drain (VD) voltages including both positive and negative biases. The devices were subjected to ramped voltage stress so as to induce the dielectric breakdown close to or at the transistor drain region.
    Electron Devices (CDE), 2013 Spanish Conference on; 01/2013

Publication Stats

2k Citations
274.77 Total Impact Points

Institutions

  • 2013–2014
    • NIMS Medicity
      Neyattinkara, Kerala, India
  • 2007–2014
    • National Institute for Materials Science
      • • Materials Analysis Station
      • • Department of Advanced Key Technologies
      • • Photocatalytic Materials Center
      • • International Center for Materials Nanoarchitectonics (MANA)
      • • Computational Materials Science Center
      Tsukuba, Ibaraki, Japan
    • University of Barcelona
      Barcino, Catalonia, Spain
  • 2000–2014
    • Tokyo Institute of Technology
      • • Graduate School of Interdisciplinary Science and Engineering
      • • Frontier Research Center
      Edo, Tōkyō, Japan
  • 2010–2011
    • Cea Leti
      Grenoble, Rhône-Alpes, France
    • University of Tsukuba
      • Applied Physics
      Tsukuba, Ibaraki, Japan
    • The University of Hong Kong
      • Department of Electrical and Electronic Engineering
      Hong Kong, Hong Kong
  • 2009
    • Nanyang Technological University
      • School of Electrical and Electronic Engineering
      Singapore, Singapore
  • 2008
    • City University of Hong Kong
      • Department of Electronic Engineering
      Kowloon, Hong Kong
  • 2006
    • Indian Institute of Technology Bombay
      • Department of Electrical Engineering
      Mumbai, Mahārāshtra, India
  • 1988–2002
    • Toshiba Corporation
      Edo, Tōkyō, Japan
  • 1989–2001
    • Stanford University
      • Center for Integrated Systems
      Stanford, CA, United States
  • 1998
    • University of Bologna
      Bolonia, Emilia-Romagna, Italy