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ABSTRACT: This paper considers a service-oriented architecture for enterprise integration and collaboration using semantic Web service technologies. A hierarchically-structured software system has been designed and developed in order to address the challenge of dynamic service composition. In comparison with existing service composers, the description of each Web service in our system is enhanced with domain-specific semantics and the essential business logic behind the service interface is further described and processed via the business rules technology. A PC manufacturing prototyping system is explored in this paper to demonstrate the practicality of our service composition system.
Computer and Information Technology Workshops, 2008. CIT Workshops 2008. IEEE 8th International Conference on; 08/2008
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ABSTRACT: Effective collaboration is crucial to the success of collaborative virtual enterprise (CVE), an emerging business paradigm driven by the increasing trend of globalization. In this paper, we adopt a service-oriented architecture for enterprise integration and collaboration based on Web service standards. In order to tackle the technical challenge associated with the dynamic formation of business workflows, a service composition framework is presented and analyzed in this paper. Comparing with existing composition systems, our framework enjoys two major improvements: (1) the description of each Web service is enhanced with rule-based modeling of the essential business logic behind the service interface; and (2) the divide-and-conquer strategy is explored in our framework to handle complex service composition tasks through a hierarchical composition architecture. A PC manufacturing prototyping system further presents a concrete demonstration of our framework in practical applications.
Industrial Electronics and Applications, 2008. ICIEA 2008. 3rd IEEE Conference on; 07/2008
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ABSTRACT: One of the main issues to be addressed in the design of large-scale wireless LANs is that of assigning demand points to access points (APs) in such a way that each demand point is assigned to one of the available APs and the aggregate traffic demand (which is referred to as load in this paper) of all demand points assigned to any AP does not overload that AP. In this paper, we consider the problem of assigning demand points to APs with the objective of minimizing the maximum load among the set of APs, which qualitatively represents congestion at some hot spots in the network service area. We refer to this problem as the load-balanced demand points assignment problem. We formulated this problem as an integer linear program (ILP) and show that the problem is NP-hard. We propose two heuristic algorithms, namely MLPT and MAWDP, to obtain nearly optimal results in polynomial time. The effectiveness of these two algorithms are proven by the simulation results.
Networks, 2004. (ICON 2004). Proceedings. 12th IEEE International Conference on; 12/2004
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ABSTRACT: Multicasting is an efficient communication tool for use in multi-point applications such as conferencing and information distribution. In ad hoc networks, node mobility causes frequent changes of network topology and may disrupt the structure of multicast trees; hence, reconstruction of the multicast tree in an efficient and effective manner becomes a critical issue. Most of the multicast tree construction protocols available presently require either a total re-build of the tree or the disconnected nodes to be reconnected to the multicast tree via the shortest path. This disrupts the optimising factors, such as energy consumption, which are used in the building of the original tree. We introduce an efficient recovery algorithm which also minimises the power consumption on the tree.
Personal Mobile Communications Conference, 2003. 5th European (Conf. Publ. No. 492); 05/2003
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Proceedings of the ACM symposium on Virtual reality software and technology. 01/2001;
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ABSTRACT: This paper consider the problem of reconfiguring two dimensional
very large scale integration (VLSI/WSI) arrays via the degradation
approach. In this approach, all elements are treated uniformly and no
elements are dedicated as spares. The goal is to derive a fault-free
subarray T from the defective host array such that the dimensions of T
are larger than some specified minimum. This problem has been shown to
be NP-complete under various switching and routing constraints. However,
we show that a special case of the reconfiguration problem with row
bypass and column rerouting capabilities is optimally solvable in linear
time. Using this result, a new fast and efficient reconfiguration
algorithm is proposed. Empirical study shows that the new algorithm
indeed produces good results in terms of the percentages of harvest and
degradation of VLSI/WSI arrays
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 11/1997; · 1.27 Impact Factor
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C.P. Low
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ABSTRACT: This paper examine the problem of reconfiguring two dimensional VLSI/WSI arrays via the degradation approach. In this approach, all elements are treated uniformly and no elements are dedicated as spares. The goal is to derive a fault-free subarray T from the defective host array such that the dimensions of T are larger than some specified minimum. This problem is known to be NP-complete under the constraint of row bypass and column rerouting. However, we show that a special case of the reconfiguration problem is optimally solvable in linear time. Using this result, a new fast and efficient reconfiguration algorithm is proposed for the general problem. Empirical study shows that the new algorithm indeed produce good results in terms of the percentages of harvest and degradation of VLSI/WSI arrays
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on; 07/1997
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ABSTRACT: In this paper, we present a new class of linear time heuristic
algorithms for reconfiguring RRAMs. One novel feature of our algorithms
is that we are able to derive new bounds on the fault counts for fast
detection of reparable and irreparable RRAMs. Another novel feature is
that, based on our algorithms, we are able to identify a new polynomial
time solvable instance of the reconfiguration problem. Empirical results
indicate that our new class of algorithms is indeed fast and effective
IEEE Transactions on Computers 06/1996; · 1.10 Impact Factor
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[show abstract]
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ABSTRACT: The authors consider the problem of reconfiguring VLSI/WSI arrays
via the degradation approach. In this approach, all elements are treated
uniformly and no elements are dedicated as spares. The goal is to derive
a fault-free subarray T from the defective host array such that the
dimensions of T are larger than some specified minimum. This problem has
been shown to be NP-complete under various switching and routing
constraints. However, it is shown that a special case of the
reconfiguration problem with row bypass and column rerouting
capabilities, is solvable in polynomial time using network flows. Using
this result, a new fast and efficient reconfiguration algorithm is
proposed. Empirical study shows that the new algorithm indeed produces
good results in terms of the percentages of harvest and degradation of
VLSI/WSI arrays
Defect and Fault Tolerance in VLSI Systems, 1993., The IEEE International Workshop on; 11/1993
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ABSTRACT: The problem of reconfiguring memory arrays using spare rows and
spare columns has received a great deal of attention in recent years.
However, most of the existing research assumes that the array contains
only stuck-at faults. This paper, addresses the problem of reconfiguring
memory arrays containing both stuck-at faults and coupling faults. The
authors present a probabilistic model for studying this problem which is
known to be NP-complete. In this model, they distinguish between two
classes of faults, namely the class of stuck-at faults and the class of
coupling faults. All faulty cells in an array are assumed to
independently distributed. The authors first present a bound on the
probabilities of occurrence of these two classes of faults that will
allow almost all problem instances to be reparable. They also present a
bound on these probabilities of defects that will make reconfiguration
almost impossible. Empirical study is carried out to validate
theoretical results and to investigate the nature of problem instances
with probabilities of defects that do not fall within the theoretical
bounds
Defect and Fault Tolerance in VLSI Systems, 1992. Proceedings., 1992 IEEE International Workshop on; 12/1992
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ABSTRACT: The authors present a fast simulated annealing algorithm for the
problem of fault covering of redundant RAMs. The authors propose a
simple representation of repair solutions from which they derive a
natural definition of moves and neighboring solutions. The algorithm has
been implemented and tested on some benchmark problems. The results show
that the method not only produces very good quality solutions, but also
runs very fast. In fact, for all the repairable chips, the simulated
annealing algorithm finds a repair solution within a second for various
problem sizes
Circuits and Systems, 1991., IEEE International Sympoisum on; 07/1991
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ABSTRACT: The (α, β)-cover problem is the problem of finding a
vertex cover S <sub>X</sub>∪ S <sub>Y</sub> with
S <sub>X</sub>⊆ X and
S <sub>Y</sub>⊆Y, in a bipartite graph G =( X
, Y , E ) that satisfies the constraints
| S <sub>x</sub>|⩽α| X | and | S <sub>Y
</sub>|⩽β| Y | where α, β∈(0, 1). This
problem has applications in the repair of large memory chips and has
been shown to be NP-complete. The authors a new algorithm for finding
(α, β)-covers, improvements to the probabilistic analysis
given by W.P. Shi and W.K. Fuchs (1989), and a new probabilistic
algorithm which runs almost always in
O (| E |√ n ) on any edge probability. The
authors note that the probabilistic algorithm works for any edge
probability p ( n ) while the algorithm of Shi and Fuchs
works only when p ( n )⩽0.5/ n . In
particular, the result shows that the (α, β)-cover problem is
almost always solvable in polynomial time
Circuits and Systems, 1991., IEEE International Sympoisum on; 07/1991
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ABSTRACT: The authors present new results for the fault covering problem and
propose an algorithm that integrates these new results. They present a
fast greedy algorithm for constructing repair solutions and establish a
simple criterion under which they can guarantee that the algorithm will
find a repair solution. This, in turn, leads to a simple test for
repairability. The authors present a new test for detecting irreparable
chips. It is shown that this test provides an improved bound on the
number of faults for detecting irreparability. The new tests presented
are simpler than previous tests and they run in linear time. The authors
also propose an algorithm that integrates these new tests for the fault
covering problem. The integrated algorithm is very fast and very
effective. Extensive testing using a large sample of problems with the
generalized negative binomial fault distribution as well as problems
with random fault distribution shows that the integrated algorithm is
able to detect virtually all instances of reparability and
irreparability
Circuits and Systems, 1991., IEEE International Sympoisum on; 07/1991
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[hide abstract]
ABSTRACT: Effective collaboration is crucial to the success of Collaborative Virtual Enterprise (CVE), an emerging business paradigm driven by the increasing trend of globalization. In this paper, we adopt a service-oriented architecture for enterprise integration and collaboration based on Web Service standards. In order to tackle the technical challenge associated with the dynamic formation of business workflows, a service composition framework is presented and analyzed in this paper. Comparing with existing composition systems, our framework enjoys two major improvements: (1) the description of each Web Service is enhanced with rule-based modeling of the essential business logic behind the service interface; and (2) the di-vide-and-conquer strategy is explored in our framework to handle complex service composition tasks through a hierarchi-cal composition architecture. A PC manufacturing prototyping system further presents a concrete demonstration of our framework in practical applications. Yes Yes
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[show abstract]
[hide abstract]
ABSTRACT: This paper considers a service-oriented architecture for enterprise integration and collaboration using semantic Web Service technologies. A hierarchically-structured software system has been designed and developed in order to address the challenge of dynamic service composition. In comparison with existing service composers, the description of each Web Service in our system is enhanced with domain-specific semantics and the essential business logic behind the service interface is further described and processed via the business rules technology. A PC manufacturing prototyping system is explored in this paper to demonstrate the practicality of our service composition system. Yes Yes
