P. Kostarakis

National Center for Scientific Research Demokritos, Athens, Attiki, Greece

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Publications (11)0.81 Total impact

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    Article: Analog to Digital Converter: a Key Concept in the Implementation of a 3G Software Defined Radio Receiver
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    ABSTRACT: With the dawn of a new millennium we find ourselves one step before the emergence of the third generation (3G) mobile communications systems in the world market. The implementation of the 3G and furthermore 4G mobile communications systems is included within the intentions of the so-called software defined radio (SDR) systems [1]. The design, development and the implementation of SDR systems are based on a combination and evolution of technologies and techniques including mainly: smart antennas, radio frequency (RF) down/up converters, analog to digital converters (ADCs) and digital to analog converters (DACs), digital signal processors (DSPs), modelling and system description languages. In this paper a quantitative analysis of the basic parameters of one of the most important segments of an SDR receiver, the Analog to Digital Converter, is presented. ADC's of the latest technology and their basic specifications are also indicated.
    06/2002;
  • Article: Normalization of propagation measurements with respect to terrain effect
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    ABSTRACT: In this paper, we introduce a method for the reliable modelling of propagation loss using measurements data. Using point to point effective height calculation, we apply a methodology for the normalization of signal propagation loss measurements with respect to terrain effect. Moreover, by applying the proposed normalization methodology on two different measurement data sets, taken in the same urban environment (Athens, Greece), it is experimentally proved that the effective height is accurately expressing the influence of terrain morphology in the vicinity of mobile unit on signal variability. Copyright © 2001 John Wiley & Sons, Ltd.
    International Journal of Communication Systems 04/2001; 14(3):333 - 343. · 0.41 Impact Factor
  • Article: A method of accurate determination of azimuthal distribution of received RF power
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    ABSTRACT: In this paper, we introduce a method for the determination of directional distribution of received RF power, with angular resolution independent of receiving antenna radiation pattern. The proposed method is based on a series of measurements taken while rotating, at fixed predefined steps, a usual directional antenna of known radiation pattern on the azimuthal plain. It is proved that the resolution accuracy of the measurement method depends only on the angular step of the antenna rotation and it is independent of the antenna beamwidth. As a result of this feature, the proposed method allows the determination of the RF power angular distribution with fine resolution using a directional antenna of much wider beamwidth for the measurements. Copyright © 2001 John Wiley & Sons, Ltd.
    International Journal of Communication Systems 02/2001; 14(2):189 - 197. · 0.41 Impact Factor
  • Conference Proceeding: Evaluation of radio propagation parameters for field strengthprediction using neural networks
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    ABSTRACT: Radio propagation models for field strength prediction are essential for designing and installing a mobile radio communications system. Typical backpropagation neural network (BPN) models with different input parameters are developed and used to evaluate and assess the relative importance of a set of radio propagation parameters for field strength prediction. The NN models are trained on data measurements of propagation loss with terrain information taken in an urban area (Athens region) in the 900 MHz band. The performance of all NN models is evaluated by comparing their prediction error statistics of average value, standard deviation, root mean square and the correlation between their predicted values and the true data measurements. The NN model with the best performance provides an indication of the most important set of parameters for field strength prediction
    Antennas and Propagation for Wireless Communications, 1998. 1998 IEEE-APS Conference on; 12/1998
  • Conference Proceeding: A totally self-checking 1-out-of-3 code error indicator
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    ABSTRACT: In this paper, an asynchronous TSC 1-out-of-3 (1/3) code error indicator is introduced that memorises erroneous 1/3 code inputs {000, 011, 101, 110, 111} with time duration greater than a discrimination time T. Such an error indicator is used to discriminate transient erroneous 1/3 code inputs from real ones as well as to detect not only faults that cause logical errors but also delay faults (short or long) that alter the circuit delay outside its specified limits (upper or lower bounds) without causing logical errors. To our knowledge, our error indicator is the first TSC 1/3 code error indicator proposed in the open literature
    European Design and Test Conference, 1997. ED&TC 97. Proceedings; 04/1997
  • Conference Proceeding: Totally Self Checking reconfigurable duplication system withseparate internal fault indication
    N. Gaitanis, P. Kostarakis, A. Paschalis
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    ABSTRACT: A Totally Self Checking (TSC) reconfigurable duplication system with respect to single cell fault model is described in this paper. It consists of two identical functional self checking units that receive the same inputs. TSC checkers are associated with each functional unit and produce either a normal indication when the output is correct or an error indication when the output is incorrect. The circuit that receives the indications of the two TSC checkers is a TSC decision circuit that produces two indication outputs E and F, respectively. E indicates mainly the status of the outputs of units while F indicates the existence of internal faults in the TSC decision circuit. Such indications can be used for the non stop repair before redundancy is exhausted. Thus continuous operation is preserved increasing the availability and the reliability of the system
    Test Symposium, 1995., Proceedings of the Fourth Asian; 12/1995
  • Conference Proceeding: C-testable multipliers based on the modified Booth algorithm
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    ABSTRACT: In this paper we show that the conventional implementation of the multiplier based on the modified Booth algorithm with 2-bit recording is not C-testable and then we propose simple modifications that result in a C-testable design. A test set of 80 vectors is sufficient to test each cell of our multiplier exhaustively, irrespectively of its size. All single stuck-at faults are detectable with only 31 test vectors. The number of the required extra primary inputs is only two, while both the hardware and delay overhead are very small and decrease with increasing N. For example, for our C-testable design of the 64×64 multiplier, the hardware overhead is 1.60% and the delay overhead is 9.76%
    Test Symposium, 1994., Proceedings of the Third Asian; 12/1994
  • Conference Proceeding: Development of a conformance test system for ERMES receivers
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    ABSTRACT: A description of the conformance test system for the pan-European paging system ERMES is presented. This test system has been developed for checking the ERMES receivers for conformity to the relevant air interface and receiver operation standard specification according to the ISO 9646 standardized methodology for conformance testing services
    Personal, Indoor and Mobile Radio Communications, 1992. Proceedings, PIMRC '92., Third IEEE International Symposium on; 11/1992
  • Conference Proceeding: A conformance test system for DECT physical layer
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    ABSTRACT: The paper deals with the physical layer conformance testing of the Digital European Cordless Telecommunications (DECT) system. The abstract test suite, the test system and an automated test realization process are described in accordance with the OSI conformance testing methodology and framework (ISO/TEC 9646). The proposed test system has been adopted by the test laboratories which are going to provide a conformance test service on DECT equipment in Europe
    Personal, Indoor and Mobile Radio Communications, 1992. Proceedings, PIMRC '92., Third IEEE International Symposium on; 11/1992
  • Conference Proceeding: An asynchronous totally self-checking two-rail code error indicator
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    ABSTRACT: In this paper an asynchronous TSC two-rail code error indicator is presented. Such an error indicator memorises error indications {00,11} generated by TSC checkers with time duration greater than a tolerant limit T and can be used to detect not only faults that cause logical errors bat also faults that cause additional delays. Thus, concurrent detection, of delay faults inside the checkers is an additional application of the proposed circuit. The proposed TSC error indicator is more efficient than the TSC error indicator presented by Gaitanis (see IEEE Trans. Comput., vol. 34, no. 8, p. 753-61, 1985) which, to the authors' knowledge, is the only existing TSC error indicator in the open literature
    VLSI Test Symposium, 1996., Proceedings of 14th;
  • Article: Totally Self Checking reconfigurable duplication system with separate internal fault indication
    N. Gaitanis, P. Kostarakis, A. Paschalis
    [show abstract] [hide abstract]
    ABSTRACT: A Totally Self Checking (TSC) reconfigurable duplication system with respect to single cell fault model is described in this paper. It consists of two identical functional self checking units that receive the same inputs. TSC checkers are associated with each functional unit and produce either a normal indication when the output is correct or an error indication when the output is incorrect. The circuit that receives the indications of the two TSC checkers is a TSC decision circuit that produces two indication outputs E and F, respectively. E indicates mainly the status of the outputs of units while F indicates the existence of internal faults in the TSC decision circuit. Such indications can be used for the non stop repair before redundancy is exhausted. Thus continuous operation is preserved increasing the availability and the reliability of the system.
    Asian Test Symposium.