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ABSTRACT: Analog & digital circuits implemented in a dual threshold voltage (V<sub>T</sub>) p-channel organic technology are presented. The dual V<sub>T</sub> organic technology is compatible with large-area and mechanically flexible substrates due to its low processing temperature (≤ 95°C) and scalable patterning techniques. We demonstrate the first analog & digital organic integrated circuits produced by a dual-gate metal process. The analog circuits are powered by a 5-V supply and include a differential amplifier and a two-stage uncompensated operational amplifier (op-amp). A dynamic comparator is measured to have an input offset voltage of 200 mV and latching time of 119 ms. Both the comparator and the op-amp dissipate 5 nW or less. Area-minimized digital logic is presented. Inverters powered by a 3-V supply were measured to have positive noise margins and consumed picowatts of power. An 11-stage ring oscillator, also powered by a 3-V supply, swings near rail to rail at 1.7 Hz. These results demonstrate dual threshold voltage process feasibility for large-area flexible mixed-signal organic integrated circuits.
IEEE Transactions on Electron Devices 04/2011; · 2.32 Impact Factor
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ABSTRACT: A fully photolithographic dual threshold voltage (V<sub>T</sub>) organic thin-film transistor (OTFT) process suitable for flexible large-area integrated circuits is presented. The nearroom-temperature (<; 95 °C) process produces integrated dual V<sub>T</sub> pentacene-based p-channel transistors. The two V<sub>T</sub> 's are enabled by using two gate metals of low (aluminum) and high (platinum) work function. The Al and Pt gate OTFTs exhibit nominally identical current-voltage transfer curves shifted by an amount ΔV<sub>T</sub>. The availability of a high-V<sub>T</sub> device enables area-efficient zero-Vos high-output-resistance current sources, enabling high-gain inverters. We present positive noise margin inverters and rail-to-rail ring oscillators powered by a 3-V supply-one of the lowest supply voltages reported for OTFT circuits. These results show that integrating nand p-channel organic devices is not mandatory to achieve functional area-efficient low-power organic integrated circuits.
IEEE Transactions on Electron Devices 12/2010; · 2.32 Impact Factor
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ABSTRACT: A new technique called digital phase tightening reduces phase noise from receiver front-end circuits to allow precise phase estimation for digital beamforming in millimeter-wave (MMW) imaging applications. This is achieved by leveraging the large ratio between the MMW carrier frequency and the relatively low frame rates in imaging applications. By mixing down to an intermediate frequency (IF) and then averaging over many samples to estimate the phase, we reduce phase noise and attain phase error of the MMW beamformer in the femtosecond range. A test chip demonstrating the phase tightening concept was designed and fabricated using 0.13μm CMOS, and we show that an RMS error of 3.5fs is feasible with this technique.
Custom Integrated Circuits Conference (CICC), 2010 IEEE; 10/2010
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ABSTRACT: A 76 GHz phase-locked loop (PLL) was designed in 0.13 μm IBM BiCMOS8HP technology with the intended application of millimeter-wave imaging. The PLL has a type II second order loop filter. The voltage-controlled oscillator (VCO) uses a cross-coupled BJT topology with capacitor feedback. The divider chain has nine divide-by-2 static frequency dividers in which the first seven use ECL logic and are followed by two CMOS stages. Measurement results show a de-embedded single-ended output power of -2 dBm, a phase noise of -81 dBc/Hz at 1 MHz offset from the carrier, and a total power dissipation of 107 mW.
Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International; 06/2010
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ABSTRACT: The effects of bias stress in integrated pentacene organic transistors are studied and modeled for different stress conditions. It is found that the effects of bias stress can be expressed in terms of the shift in applied gate voltage ¿V for a given current. An empirical equation describing ¿V in terms of different gate and drain bias stress measurements and stress times is presented and verified. In the measured devices, ¿ V saturates at 14 V, independent of the gate bias-stress condition. A model based on carrier trapping rate equation that accounts for this ¿V saturation is developed. The model suggests that the ¿V saturation is due to the small density of traps compared to the channel carrier density.
IEEE Transactions on Electron Devices 06/2010; · 2.32 Impact Factor
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ABSTRACT: An integrated organic temperature-sensing circuit array compatible with flexible and large-area substrates is presented. The array outputs an average value of 6.8 mV/°C, which is 22à more responsive than the MOSFET implementation while dissipating 90 nW/cell. Highly linear outputs enable two-point calibrations that remove the effects of cell-to-cell variation.
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International; 03/2010
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ABSTRACT: Since the first demonstration of a comparator-based switched-capacitor circuit, analog-to-digital (A/D) converters based on virtual ground detection have made steady and significant progress. Comparators have been replaced by zero-crossing detectors, leading to the development of zero-crossing based circuits for faster speed and lower power. All facets of performance including the sampling rate, effective number of bits, noise floor, and figure-of-merit have improved substantially. This paper focuses on recent implementations of zero-crossing based A/D converters and discusses the technical issues unique to these A/D converters as well as solutions that have been developed to improve their performance and practicality. A series of prototype designs whose performance ranges from 8 bit, 200 MS/s to 12 bit, 50 MS/s are described. The ultimate low power potentials of these A/D converters are compared with various different types of complementary metal-oxide-semiconductor A/D converters from a fundamental thermal noise standpoint.
Proceedings of the IEEE 03/2010; · 6.81 Impact Factor
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ABSTRACT: We report a low temperature ( ~ 100°C) lithographic method for fabricating hybrid metal oxide/organic field-effect transistors (FETs) that combine a zinc-indium-oxide (ZIO) semiconductor channel and organic, parylene, dielectric layer. The transistors show a field-effect mobility of (12±0.8) cm<sup>2</sup> V<sup>-1</sup> s<sup>-1</sup>, on/off ratio of 10<sup>8</sup> and turn-off voltage of V<sub>off</sub> = -1 V. This work demonstrates that organic and inorganic layers can be deposited and patterned using a low temperature budget, integrated lithographic process to make FETs suitable for large area electronic applications.
Journal of Display Technology 02/2010; · 2.28 Impact Factor
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ABSTRACT: For the first time, we demonstrate control of organic thinfilm transistor's (OTFT) threshold voltage (V<sub>T</sub>) by modifying the gate work function. We present a near-room-temperature, fully lithographic process to fabricate integrated pentacene dual V<sub>T</sub> OTFTs suitable for large-area and flexible mixed signal circuits. Platinum and aluminum are used as the gate metals for the high V<sub>T</sub> (more depletion-like) and low V<sub>T</sub> (more enhancement-like) p-channel devices, respectively. The availability of a high V<sub>T</sub> device enables area-efficient zero-VGS current source loads. We demonstrate positive noise margin inverters which use pico Watts of power and a 3 V supply. Compared to a single V<sub>T</sub> implementation, the dual V<sub>T</sub> inverter occupies an area that is 30Ã smaller, and is 17Ã faster. These results show that p-channel only organic technologies can produce functional and low-power circuits without integrating a complementary device.
Electron Devices Meeting (IEDM), 2009 IEEE International; 01/2010
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ABSTRACT: Noise analysis for comparator-based circuits is presented. The goal is to gain insight into the different sources of noise in these circuits for design purposes. After the general analysis techniques are established, they are applied to different noise sources in the comparator-based switched-capacitor pipeline analog-to-digital converter (ADC). The results show that the noise from the virtual ground threshold detection comparator dominates the overall ADC noise performance. The noise from the charging current can also be significant, depending on the size of the capacitors used, but the contribution was small in the prototype. The other noise sources have contributions comparable to those in op-amp-based designs, and their effects can be managed through appropriate design. In the prototype, folded flicker noise was found to be a significant contributor to the broadband noise because the flicker noise of the comparator extends beyond the Nyquist rate of the converter.
Circuits and Systems I: Regular Papers, IEEE Transactions on 04/2009; · 1.97 Impact Factor
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ABSTRACT: A wideband 77-GHz front-end receiver for passive imaging has been designed and characterized. This system comprises a fully differential low-noise amplifier (LNA), double-balanced mixer, and voltage-controlled oscillator (VCO). The 77-GHz LNA achieves 4.9-6.0-dB noise figure (NF), 18-26-dB gain, and S 11 and S 22 of - 13.0 and - 12.8 dB, respectively. The double-balanced mixer achieves 12-14-dB NF, 20-26-dB conversion gain, and -26-dBm P1dB (input referred). The VCO achieves output power from - 2 to 0 dBm with phase noise of ~ -93 dBc/Hz at 72 GHz, and can be tuned by approximately 3 GHz. The NF can be substantially improved with the addition of image-reject Chebyshev bandpass filters at the interface between the LNA and mixer. The 77-GHz receiver achieves 40-46-dB max conversion gain, output-referred P1dB of 2 dBm, and power dissipation of 195 mW. A 90-GHz LNA has also been characterized as an integral part of a higher resolution 94-GHz imager. This LNA achieves 22-dB maximum gain, 7.0-dB NF, and - 25- and - 10-dB S 11 and S 22 , respectively, at 90 GHz. This LNA also exhibits excellent ultra-wideband performance, achieving ges 10-dB gain from 40 to 100 GHz.
IEEE Transactions on Microwave Theory and Techniques 12/2008; · 1.85 Impact Factor
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ABSTRACT: We define a metric of useful operating lifetime of an organic light-emitting device (OLED) display and relate it to the commonly measured half-life of constituent OLED pixels. We enumerate sources of OLED operational instability and propose an optical feedback solution in a novel integrated configuration to counter pixel aging and maintain stable light output across all of the pixels of an OLED display. Such optical feedback can correct pixel imperfections in both active matrix and passive matrix OLED displays. As an example, we analyze lifetime data previously published by Kwong et al., in 2002, and demonstrate that our optical feedback technique could maintain 100 cd/m<sup>2</sup> display light output within a 2% brightness accuracy for more than 25 000 hours of continuous use for this specific OLED system. From this example we draw conclusions generally applicable to extending stable operating lifetime of other OLED structures.
Journal of Display Technology 10/2008; · 2.28 Impact Factor
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ABSTRACT: Challenges in analog-to-digital (A/D) conversion for future scaled complementary metal-oxide-semiconductor (CMOS) technologies are investigated. The analysis of a figure of merit (FOM) that accounts for energy per conversion step indicates that op-amps are one of the most significant performance bottlenecks. New mixed-signal circuit architectures, which are more suitable for A/D conversion in scaled CMOS technologies and are more energy efficient than traditional architectures, are described. These circuits sense the crossing of virtual ground with comparators or zero-crossing detectors instead of forcing the virtual ground with op-amps. The FOM derivations for the comparator and zero-crossing based circuits indicate potentially a large improvement over traditional op-amp based circuits. The designs and experimental results of analog-to-digital converters based on a prototype comparator and zero-crossing are discussed in detail.
Proceedings of the IEEE 03/2008; · 6.81 Impact Factor
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ABSTRACT: In this paper, a proof of concept 4 x 4 active-matrix imager fabricated at near room temperature (< 95 degC) is presented. Conventional photolithography and inkjet printing were used to pattern integrated organic FETs and photoconductors. The design and characterization of a pixel circuit is described. A simple first-order calibration technique is used to partially compensate for fixed pattern noise. Following the calibration, the imager is shown to correctly image a "T" pattern.
IEEE Transactions on Electron Devices 03/2008; · 2.32 Impact Factor
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ABSTRACT: A wideband software-defined digital-RF modulator targeting Gb/s data rates is presented. The modulator consists of a 2.625-GS/s digital DeltaSigma modulator, a 5.25-GHz direct digital-RF converter, and a fourth-order auto-tuned passive LC RF bandpass filter. The architecture removes high dynamic range analog circuits from the baseband signal path, replacing them with high-speed digital circuits to take advantage of digital CMOS scaling. The integration of the digital-RF converter with an RF bandpass reconstruction filter eliminates spurious signals and noise associated with direct digital-RF conversion. An efficient passgate adder circuit lowers the power consumption of the high-speed digital processing and a quadrature digital-IF approach is employed to reduce LO feedthrough and image spurs. The digital-RF modulator is software programmable to support variable bandwidths, adaptive modulation schemes, and multi-channel operation within a frequency band. A prototype IC built in 0.13-mum CMOS demonstrates a data rate of 1.2 Gb/s using OFDM modulation in a bandwidth of 200 MHz centered at 5.25 GHz. In-band LO and image spurs are less than -59 dBc without requiring calibration. The modulator consumes 187 mW and occupies a die area of 0.72 mm<sup>2</sup>.
IEEE Journal of Solid-State Circuits 09/2007; · 3.23 Impact Factor
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ABSTRACT: A Wideband 77-GHz Front End Receiver for Passive Imaging has been designed and characterized. This system comprises a fully differential LNA, double-balanced mixer and VCO. The LNA achieves 4.9-6.0 dB NF, 18-26 dB gain, and S11, S22 of -13.0 and -12.8 dB, respectively. The double-balanced mixer achieves 12-14 dB NF, 20-26 dB conversion gain and -26 dBm PldB (input-referred). The VCO achieves output power from -2 to 0 tlBm with phase noise of ~-93 dBc/Hz at 72 GHz, and approximately 3 GHz of tuning range. The receiver achieves 40-46 dB max conversion gain, output-referred P1dB of 2 dBm and power dissipation of 195 mW.
Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE; 07/2007
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ABSTRACT: An active-matrix organic imager suitable for large area flexible electronics is presented. The imager is fabricated using low-temperature (<95degC) processing, producing integrated organic transistors, organic photodetectors, and metal interconnects. Each pixel has a responsivity of 6 times 10<sup>-5</sup> A/W and an on/off ratio of 880. The 4 times 4 array occupies 10.2mm<sup>2</sup> and is powered by a 25V supply.
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International; 03/2007
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ABSTRACT: A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. It achieves an ENOB of 8.6 bits for a 3.8-MHz input signal and dissipates 2.5 mW
IEEE Journal of Solid-State Circuits 01/2007; · 3.23 Impact Factor
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ABSTRACT: Adaptive modulation is implemented on a wideband OFDM transceiver prototype to quantify its performance in indoor wireless environment. Our measurements indicate that over a bandwidth of 100 MHz, the channel varies quite significantly. With a target uncoded bit error rate of 10 <sup>-3</sup>, it is found that at link distances of 1.0 to 10.8 meters, the data rate varies from 395 Mbps to 76 Mbps. The measured adaptive average data rate is 2.88 times the average data rate without adaptive modulation. Furthermore, the adaptive modulation is 8.9% of the entire transceiver modem which means it is of low complexity
Ultra-Wideband, The 2006 IEEE 2006 International Conference on; 10/2006
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ABSTRACT: A low power, wideband transmitter architecture utilizing ΔΣ direct digital modulation of an RF carrier is presented. Spurious signals associated with direct digital-RF conversion are eliminated through integration of a self-tuned passive LC bandpass filter. The digital-RF modulator is intended for OFDM systems and can provide data rates greater than 1 Gb/s using a bandwidth of 200 MHz centered at 5.25 GHz. Measured results show that the largest modulator spur is -44 dBc. The transmitter, including LO quadrature generator, quadrature digital-RF converter, and filter circuitry, consumes 50 mW and occupies a die area of 0.56 mm<sup>2</sup> in a 0.13μm SiGe BiCMOS process.
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE; 10/2006
