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[show abstract]
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ABSTRACT: Discrete 4H-SiC PiN diode chips have been developed for extremely high power handling applications. These diodes have a forward voltage of less than 3.2 V at 180 A (100 A/cm) and are capable of blocking 4.5 kV with a reverse leakage current of less than one muA. At 1.5 cm times 1.5 cm, these discrete 4H-SiC PiN diode chips have over two times the area of the previous largest discrete 4H-SiC power device. Furthermore, considerable progress has been made in achieving V<sub>F</sub> stability, as no measurable increase in V<sub>F</sub> was observed on a packaged diode following a 120 hour DC stress at 90 A. When switched from 180 A forward current at a dI/dt of 300 A/mus, the diodes showed a peak reverse current of 50 A and a reverse recovery time of 320 ns. These diodes demonstrate the outstanding capabilities of 4H-SiC power devices given state-of-the-art 4H-SiC substrates, epitaxy, device design, and processing
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on; 07/2006
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St. G. Müller,
J. J. Sumakeris,
M. F. Brady,
R. C. Glass,
H. McD. Hobgood,
J. R. Jenny, R. Leonard,
D. P. Malta,
M. J. Paisley,
A. R. Powell,
V. F. Tsvetkov,
S. T. Allen,
M. K. Das,
J. W. Palmour,
C. H. Carter Jr
[show abstract]
[hide abstract]
ABSTRACT: The current status of SiC bulk growth is reviewed, while specific
attention is given to the effect of defects in SiC substrates and
epitaxial layers on device performance and yield. The progress in SiC
wafer quality is reflected in the achievement of micropipe densities
as low as 0.92 cm−2 for a 3-inch n-type 4H-SiC wafer, which
provides the basis for a high yielding fabrication process
of large area SiC power devices. Using a Murphy Probe Yield Analysis for the
breakdown characteristics of 10 kV PiN diodes we have extracted
an “effective” defect density for 4H-SiC material to be as low as
30 cm−2, providing valuable information to further isolate and
address the specific material defects critical for device performance.
We address the problematic degradation of the forward characteristics
(V
f
-drift) of bipolar SiC PiN diodes [CITE].
The underlying mechanism due to stacking fault formation in the epitaxial
layers and possible effects of device processing are investigated.
An improved device design is demonstrated, which effectively stabilizes
this V
f
-drift. We show the progression in the development of
semi-insulating SiC grown by the sublimation technique from extrinsically
doped material to high purity semi-insulating (HPSI) 4H-SiC bulk crystals of
up to 100 mm diameter without resorting to the intentional introduction
of elemental deep level dopants, such as vanadium. Uniform resistivities
in 3-inch HPSI wafers greater than 3 × 1011 Ω-cm
have been achieved. Secondary ion mass spectrometry, deep level transient
spectroscopy and electron paramagnetic resonance data suggest that the
semi-insulating behavior in HPSI material originates from deep levels
associated with intrinsic point defects. MESFETs produced on HPSI wafers
are free of backgating effects and have resulted in the best combination of
power density and efficiency reported to date for SiC MESFETs of
5.2 W/mm and 63% power added efficiency (PAE) at 3.5 GHz.
The European Physical Journal Applied Physics 06/2004; 27:29 - 35. · 0.77 Impact Factor
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St.G. Müller,
J.J. Sumakeris,
M.F. Brady,
R.C. Glass,
H.McD. Hobgood,
J.R. Jenny, R. Leonard,
D.P. Malta,
M.J. Paisley,
A.R. Powell,
V.F. Tsvetkov,
S.T. Allen,
M.K. Das,
J.W. Palmour,
C.H. Carter Jr
[show abstract]
[hide abstract]
ABSTRACT: The current status of SiC bulk growth is reviewed, while specific attention is given to the effect of defects in SiC substrates and epitaxial layers on device performance and yield. The progress in SiC wafer quality is reflected in the achievement of micropipe densities as low as 0.92 cm$^{-2}$ for a 3-inch n-type 4H-SiC wafer, which provides the basis for a high yielding fabrication process of large area SiC power devices. Using a Murphy Probe Yield Analysis for the breakdown characteristics of 10 kV PiN diodes we have extracted an “effective" defect density for 4H-SiC material to be as low as 30 cm$^{-2}$, providing valuable information to further isolate and address the specific material defects critical for device performance. We address the problematic degradation of the forward characteristics ($V_f$-drift) of bipolar SiC PiN diodes [CITE]. The underlying mechanism due to stacking fault formation in the epitaxial layers and possible effects of device processing are investigated. An improved device design is demonstrated, which effectively stabilizes this $V_f$-drift. We show the progression in the development of semi-insulating SiC grown by the sublimation technique from extrinsically doped material to high purity semi-insulating (HPSI) 4H-SiC bulk crystals of up to 100 mm diameter without resorting to the intentional introduction of elemental deep level dopants, such as vanadium. Uniform resistivities in 3-inch HPSI wafers greater than $3\times 10^{11}\;\mathrm{\Omega}$-cm have been achieved. Secondary ion mass spectrometry, deep level transient spectroscopy and electron paramagnetic resonance data suggest that the semi-insulating behavior in HPSI material originates from deep levels associated with intrinsic point defects. MESFETs produced on HPSI wafers are free of backgating effects and have resulted in the best combination of power density and efficiency reported to date for SiC MESFETs of 5.2 W/mm and 63% power added efficiency (PAE) at 3.5 GHz.
http://dx.doi.org/10.1051/epjap:2004085.
