J.L. Dawson

Massachusetts Institute of Technology, Cambridge, MA, United States

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Publications (17)17.66 Total impact

  • T.W. Barton, J.L. Dawson, D.J. Perreault
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    ABSTRACT: This letter presents a 2.14 GHz, four-way power combining and outphasing system for high-power amplifiers such as those in radio basestations (RBS). The combiner is ideally lossless, and enables power control through load modulation of the power amplifiers (PAs). A discrete-component power combiner is designed and characterized, and combined with inverse Class-F PAs using GaN HEMT devices to develop a complete PA system. We demonstrate the effectiveness of the system over a range of outphasing control angles. This first-ever microwave implementation of the outphasing system has a peak CW drain efficiency of 68.9%, with efficiency greater than 55% over a 5.5 dB power range. It provides an average modulated efficiency of 57% for a W-CDMA signal with 3.47 dB peak to average power ratio (PAPR) at 42 dBm output power.
    IEEE Microwave and Wireless Components Letters 01/2013; 23(1):28-30. · 1.78 Impact Factor
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    ABSTRACT: A 1.95-GHz asymmetric multilevel outphasing (AMO) transmitter with class-E GaN power amplifiers (PAs) and discrete supply modulators is presented. AMO transmitters achieve improved efficiency over envelope tracking (ET) transmitters by replacing the continuous supply modulator with a discrete supply modulator implemented with a fast digital switching network. Outphasing modulation is used to provide the required fine output envelope control. A 4-level supply modulator is implemented that allows for fast and efficient discrete envelope modulation with up to 28-V supply voltages using low-voltage gate drivers and time-alignment logic. With two class-E GaN PAs that achieve 62.5% power-added efficiency (PAE) at 40- dBm peak output power, the AMO transmitter delivers 42.6- dBm peak output power at 1.95-GHz. For a 16-QAM signal at 36-dBm output power, the transmitter achieves 44.2/42.8/41.4% average system efficiency and 2.0/2.1/3.1% EVM for 10/20/40-MHz channel bandwidth, respectively.
    Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International; 07/2011
  • SungWon Chung, J.L. Dawson
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    ABSTRACT: This paper presents a low-power, low-complexity adaptive digital predistortion system based on a quadrature ΔΣ modulator for linearizing WLAN PAs. To decrease the modulator oversampling rate, second-order ΔΣ modulation is employed with phase alignment and gain normalization, which ensure the stability of the modulator. The feedback path of the predistortion system is comprised of an RF subsampler and a 32-MSPS ADC. An experimental system linearizes a commercial 2.4-GHz SiGe PA transmitting a 20.2-dBm WLAN signal with 10-MHz channel bandwidth. The background adaptation of a predistortion look-up table in the ΔΣ modulator is achieved in 524 milliseconds. The experimental predistortion system improves the EVM of the unlinearized PA from 5.90% to 0.96%, and enhances the ACPR from -33.3 dBc to -38.0 dBc.
    Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International; 07/2011
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    ABSTRACT: A compact, low-power, digitally-assisted sensor interface for biomedical applications is presented. It exploits oversampling and mixed-signal feedback to reduce system area and power, while making the system more robust to interferers. Antialiasing is achieved using a charge-sampling filter with a sinc frequency response and programmable gain. A mixed-signal feedback loop creates a sharp, programmable notch for interference cancellation. A prototype was implemented in a 0.18-μm CMOS process. The on-chip blocks operate from a 1.5-V supply and consume between 255 nW and 2.5 μW depending on noise and bandwidth requirements.
    IEEE Journal of Solid-State Circuits 05/2011; · 3.06 Impact Factor
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    ABSTRACT: We present a high-efficiency transmitter based on asymmetric multilevel outphasing (AMO). AMO transmitters improve their efficiency over LINC (linear amplification using nonlinear components) transmitters by switching the output envelopes of the power amplifiers among a discrete set of levels. This minimizes the occurrence of large outphasing angles, reducing the energy lost in the power combiner. We demonstrate this concept with a 2.5-GHz, 20-dBm peak output power transmitter using 2-level AMO designed in a 65-nm CMOS process. To the authors' knowledge, this IC is the first integrated implementation of the AMO concept. At peak output power, the measured power-added efficiency is 27.8%. For a 16-QAM signal with 6.1dB peak-to-average power ratio, the AMO prototype improves the average efficiency from 4.7% to 10.0% compared to the standard LINC system.
    Power Amplifiers for Wireless and Radio Applications (PAWR), 2011 IEEE Topical Conference on; 02/2011 · 3.06 Impact Factor
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    ABSTRACT: A digital-to-RF phase modulator based on a single current-steering DAC is presented, including a carrier pre-rotation scheme that prevents phase inaccuracy due to carrier feedthrough. The phase modulator has been fabricated in a standard 65-nm CMOS process and draws 1.9 mW from a 1-V supply. The modulator achieves 12-bit resolution at a measured 200 MSamples/second, state-of-the-art performance in both resolution and sampling speed. It has sufficient speed to allow for oversampling to shape the output spectrum and therefore reduce filtering requirements, as demonstrated through a 32x oversampled 8-PSK signal at 6.25 MSymbols/second with under 6.1% EVM.
    Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE; 01/2011
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    ABSTRACT: A compact, low-power, digitally-assisted sensor interface for biomedical applications is presented. It exploits oversampling and digital design to reduce system area and power, while making the system more robust to interferers. Anti-aliasing is achieved using a charge-sampling filter with a sinc frequency response and programmable gain. A mixed-signal feedback loop creates a sharp, programmable notch for interference cancelation. A prototype was implemented in 0.18 μm CMOS and the on-chip blocks consume a total of 255 nW - 2.5 μW from a 1.5 V supply depending on noise and bandwidth requirements.
    VLSI Circuits (VLSIC), 2010 IEEE Symposium on; 07/2010
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    ABSTRACT: We present a high-efficiency transmitter architecture based on asymmetric multilevel outphasing (AMO), but with a new method of generating discrete amplitude levels from the constituent amplifiers. AMO and multilevel LINC (ML-LINC) transmitters improve their efficiency over LINC by switching the supplies of the power amplifiers (PAs) among a discrete set of voltages. This allows them to minimize the occurrence of large outphasing angles. However, it is also possible to generate a discrete set of amplitudes by varying the duty cycle of the waveform that drives the PAs. The chief advantage of this discrete pulse width modulation (DPWM) is hardware simplicity, as it eliminates the need for a fast, low-loss switching network and a selection of power supply voltages. We demonstrate this concept with a 48-MHz, 20-W peak output power AMO transmitter using a four-level DPWM. At peak output power, the measured power-added efficiency is 77.7%. For a 16-QAM signal with a 6.5-dB peak-to-average power ratio, the AMO prototype improves the average efficiency from 17.1% to 36.5% compared to the standard LINC system.
    Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International; 06/2010
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    ABSTRACT: Since its invention in 1922, the super-regenerative amplifier (SRA) has been used in a variety of short-range, low-power, and/or low-cost wireless systems due to its simple implementation and excellent performance for a given power budget. Growing demand for ultralow-power receivers for short-range radios has recently reawakened an interest in the theory and design of SRAs. Building on recent work and using reasonable assumptions and approximations, we present a frequency-domain model for analyzing SRAs. We then use these models to predict the response of an SRA to arbitrary deterministic and stochastic signals including sinusoids, pulsed-sinusoids, and additive white Gaussian noise. Using the results, we present formulas for calculating the sensitivity and selectivity of SRAs. We also introduce the concept of a trigger-time that is particularly useful for accurately determining the optimal threshold in on-off keying (OOK) receivers and helps avoid the problems introduced by nonlinearity in SRAs. Finally, we present a prototype OOK SRA that achieves a sensitivity of -90 dBm at a bit rate of 300 kbps (BER of 10<sup>-3</sup>) while consuming 500 ??W, and show that its measured sensitivity matches theory within 1 dB.
    IEEE Transactions on Microwave Theory and Techniques 01/2010; · 2.23 Impact Factor
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    P.A. Godoy, D.J. Perreault, J.L. Dawson
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    ABSTRACT: We describe a new outphasing energy recovery amplifier (OPERA) which replaces the isolation resistor in the conventional matched combiner with a resistance-compressed rectifier for improved efficiency. The rectifier recovers the power normally wasted in the isolation resistor back to the power supply, while a resistance compression network (RCN) reduces the impedance variation of the rectifier as the output power varies. Because the combiner requires a fixed resistance at the isolation port to ensure matching and isolation between the two outphased power amplifiers (PAs), the RCN serves to maintain high linearity as well as high efficiency in the switching-mode PAs. For demonstration, a prototype OPERA system is designed and implemented with discrete components at an operating frequency of 48 MHz, delivering 20.8 W peak power with 82.9% PAE. The measurement results show an efficiency improvement from 17.9% to 42.0% for a 50-kHz 16-QAM signal with a peak-to-average power ratio of 6.5 dB.
    IEEE Transactions on Microwave Theory and Techniques 01/2010; · 2.23 Impact Factor
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    ABSTRACT: We describe a new outphasing transmitter architecture in which the supply voltage for each PA can switch among multiple levels. It is based on a new asymmetric multilevel outphasing (AMO) modulation technique which increases overall efficiency over a much wider output power range than the standard LINC system while maintaining high linearity. For demonstration, the overall transmitter is simulated in a 65 nm CMOS process with HSUPA and WLAN signals. The simulation results show an efficiency improvement from 17.7% to 40.7% for HSUPA at 25.3 dBm output power and from 11.3% to 35.5% for WLAN 802.11g at 22.8 dBm while still meeting system linearity requirements.
    Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE; 07/2009
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    P. Godoy, J.L. Dawson
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    ABSTRACT: We describe a general offset-canceling architecture for analog multiplication using chopper stabilization. Chopping is used to modulate the offset away from the output signal where it can be easily filtered out, providing continuous offset reduction which is insensitive to drift. Both square wave chopping and chopping with orthogonal spreading codes are tested and shown to reduce the offset down to the microvolt level. In addition, we apply the nested chopping technique to an analog multiplier which employs two levels of chopping to reduce the offset even further. We discuss the limits on the performance of the various chopping methods in detail, and present a detailed analysis of the residual offset due to charge injection spikes. An illustrative CMOS prototype in a 0.18 mum process is presented which achieves a worst-case offset of 1.5 muV. This is the lowest measured offset reported in the DC analog multiplier literature by a margin of two orders of magnitude. The prototype multiplier is also tested with AC inputs as a squarer, variable gain amplifier, and direct-conversion mixer, demonstrating that chopper stabilization is effective for both DC and AC multiplication. The AC measurements show that chopping removes not only offset, but also 1/ f noise and second-order harmonic distortion.
    IEEE Journal of Solid-State Circuits 11/2008; · 3.06 Impact Factor
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    ABSTRACT: We demonstrate energy-efficient low-complexity adaptive linearization for wideband handset power amplifiers (PAs). Due to power overhead and complexity, traditional wideband linearization techniques such as adaptive digital predistortion (DPD) thus far have not been used for wideband handset transmitters. Our energy-efficient lookup table training strategy resulted in a training energy of 1.83 nJ/entry for a 5-MHz bandwidth WiMAX orthogonal frequency division multiple access (OFDMA) transmission, which represents more than 40times improvement over state-of-the-art DPD implementations. Our experimental prototype transmitter achieves a maximum of 9.9-dB improvement of adjacent channel leakage power at 5.15-MHz offset with 22.0-dBm channel power in the 5-MHz bandwidth WiMAX-OFDMA transmission. This linearity improvement offers 26.5% savings in PA power consumption by reducing power backoff.
    IEEE Transactions on Microwave Theory and Techniques 11/2008; · 2.23 Impact Factor
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    ABSTRACT: A 350 muW MSK direct modulation transmitter and a 400 muW OOK super-regenerative receiver (SRR) are implemented in 90 nm CMOS technology. The transceiver tunes 24 MHz in frequency steps smaller than 2 kHz and is designed to meet the specifications of the Medical Implant Communications Service (MICS) standard in the 402-405 MHz band. The transmitter meets MICS mask specifications with data rates up to 120 kbps, and the receiver has a sensitivity better than -99 dBm with a data rate of 40 kbps or -93 dBm with a data rate of 120 kbps.
    VLSI Circuits, 2008 IEEE Symposium on; 07/2008
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    ABSTRACT: We present a new adaptive power amplifier (PA) linearization technique. We leverage analog Cartesian feedback (CFB) to train a Cartesian look-up table, reducing DSP and power amplifier modeling requirements to a minimum and eliminating model convergence as a design issue. Because the CFB system does not continuously operate, we overcome the bandwidth limitation traditionally associated with this technique. In addition, we exploit sample averaging to greatly relax the noise requirements of the analog feedback path. We implemented a prototype 900-MHz direct-conversion transmitter with a class-A PA. We measured a 10-dB reduction of out-of-band distortion products with no noise floor degradation for 40-MHz-bandwidth, 16-QAM test signals.
    Microwave Symposium, 2007. IEEE/MTT-S International; 07/2007
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    A. Hadiashar, J.L. Dawson
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    ABSTRACT: As with many analog building blocks, DC offsets limit the accuracy of analog multipliers. Chopper stabilization, long applied to precision amplifiers, has been recently modified to be applicable to analog multiplication (Dawson and Lee, 2003). In this paper we present a general approach to chopper stabilization for analog multiplication. An IC fabricated in National Semiconductor's 0.18mum process allowed us to characterize an array of the new multipliers, which represents the first thorough experimental characterization of the new technique. The prototype circuits exhibit an average output offset of 204muV, with a standard deviation of 23muV, while consuming 181muW of power each. These are the lowest reported measured offsets in the DC analog multiplier literature
    Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European; 10/2006
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    J.L. Dawson, T.H. Lee
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    ABSTRACT: We discuss two control problems that arise in connection with Cartesian feedback radio-frequency power amplifiers. New solutions to both problems are described, and the results of a working prototype are presented. The prototype, a integrated circuit (IC) fabricated in National Semiconductor's 0.25 /spl mu/m CMOS process, represents the first known fully integrated implementation of the Cartesian feedback concept.
    American Control Conference, 2004. Proceedings of the 2004;