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ABSTRACT: The increasing demands on future electronic products require more efficient system integration technologies. Especially the package density gap at board level with the high integrated circuits (ICs) on the one hand and the discrete passive components on the other has to be closed by new packaging technologies which integrate the passive components into the substrate, an interposer or the IC itself. This paper presents investigations for the common integration of inductors, resistors, capacitors as well as passive filter structures in a thin film build up, based on copper and benzocyclobutene (BCB). Technologies from wafer level packaging were adapted for manufacturing of the integrated components. The examinations were carried out with special focus on integrated coils and passive filter structures. Build up, design, processing as well as results of the electrical characterization of the integrated components are described in detail. Furthermore, an integrated passive device (IPD) for application as a filter element in the Bluetooth band is presented.
Electronic Components and Technology Conference, 2004. Proceedings. 54th; 07/2004
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ABSTRACT: Size reduction is one of the main driving forces for packaging in
nearly all electronic applications. The interaction of size reduction
with highest functionality and high reliability is also predominant for
all microelectronic systems. Therefore a synergism of optimal product
design, smallest single chip package and board technology will give the
best solution. Wafer level CSP will be the best solution for single chip
packaging matching all requirements for electronic systems and reducing
total cost
IEEE Transactions on Advanced Packaging 06/2000; · 1.12 Impact Factor
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ABSTRACT: The integration of passive components into the wiring substrate is
essential for the further miniaturization and cost reduction of
electronic systems. CSP and high density multilayer boards are becoming
standard in the electronic industry, but a lot of space on the board
must often be used for passive components. The integration of passives
into the board minimizes the whole system and also reduces the assembly
cost. The focus of this paper is to give an insight into the process for
the integration of NiCr resistors in an MCM-D substrate. Two approaches
are presented: (1) NiCr resistors directly on the substrate with the
multilayer Cu/photo-BCB on top; (2) NiCr resistors between the
Cu/photo-BCB layers. A test layout was designed to achieve different
values of resistance. Two different technologies were used to structure
the resistors. The reproducibility of the technology is described. A
strong effect of the photo-BCB process on the electrical resistance of
the NiCr layers was found. Thermal aging and initial reliability tests
were carried out using these test structures
Advanced Packaging Materials: Processes, Properties and Interfaces, 1999. Proceedings. International Symposium on; 04/1999
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ABSTRACT: A combination of ceramic substrate technology with thin film
processes will be presented. Thick film hybrids are used for the bottom
layers and a thin film metallization layer is deposited on top for the
redistribution of the signal lines. For the evaluation of this combined
technology test samples of multilayer ceramic substrates were
manufactured. Polymer films having a low dielectric constants and thin
film copper were used to fabricate the high density interconnection
layer. Photosensitive polymers were selected to reduce the number of
processing steps for via formation. Photo-BCB is recommended for the
dielectric layers because planarization of the ceramic substrate is the
most critical issue for the high density metallization. For thicker
photo-BCB films a tank development process was installed at
TUB/Fraunhofer-IZM which has the unique feature that the development
time is nearly independent of the layer thickness. The reliability of
the substrates was proofed by thermal cycling
Advanced Packaging Materials, 1998. Proceedings. 1998 4th International Symposium on; 04/1998
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ABSTRACT: Visionary concepts for future electronic systems, which are ubiquitous, extremely miniaturized and serve a wide range of services, are extremely challenging for current system integration and packaging technologies. In the meaning of hetero system integration different integration techniques, such as 3D integration, integration of passive components and assembly of thin chips, have to be combined to enable a further increase in package density. This paper describes an approach for 3D system integration using thin stackable substrates with high density interconnection layers, which include integrated inductors, capacitors and resistors. After a brief overview of the different passive test structures, which were exclusively designed for the evaluation of this approach, the process flow for the technological realization of the substrates were presented. Some results of the electrical characterization of the fabricated integrated passive structures were discussed. Finally initial results for the stacking of the substrates were presented
Electronic Components and Technology Conference, 2006. Proceedings. 56th;
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ABSTRACT: Integrated passives have become increasingly popular in the last years. Especially wafer level packaging technologies offer an interesting variety of different possibilities for the implementation of integrated passive components. In this context particularly the fabrication of integrated passive devices (IPDs) represents a promising solution regarding the reduction of size and assembly costs of electronic systems in package (SiP). These IPDs combine different passive components (R, L, C) in one subcomponent to be assembled in one step by standard technologies like SMD or flip chip. In this paper the wafer level thin film fabrication of such IPDs (WL-IPDs) will be discussed. After a brief overview of the different possibilities for the realization of IPDs using wafer level packaging technologies two fabricated WL-IPDs will be presented. Design, technological realization as well as results from the electrical characterization will be discussed.
Electronic Components and Technology Conference, 2005. Proceedings. 55th;
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M. Topper,
T. Rosin,
T. Fritzsch,
R. Jordan,
G. Mekonnen,
C. Sakkas,
R. Kunkel, K. Scherpinski,
D. Schmidt,
H. Oppermann,
L. Dietrich,
A. Beling,
T. Eckhardt,
H.-G. Bach,
H. Reichl
[show abstract]
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ABSTRACT: High speed interconnections for the next generation Internet or high frequency measurement systems need ultra fast photodetectors and appropriate high frequency transmission lines. A highly critical aspect for packaging these devices is the interconnection and the appropriate substrate technology. Thin film substrates using BCB are a suitable approach due to the high accurate manufacturing technology and the possibility to use low k dielectrics. FC assembly is the best interconnection technology for this very high frequency application, and it is already proven in production. Ultra-fast InP-photodetectors (100 GHz) with CPW signal pads (GSG) had to be connected to a 1 mm RF plug via a micro-stripline (MS). Flip chip bumps on InP and interconnection schemes for CPW to MS transitions were investigated. The electrical performance of these structures has been simulated and is discussed with respect to the electrical tests done on the samples. The process compatibility of the chosen materials was verified separately and the properties adapted, if necessary. Reliability tests have been performed on test samples and are discussed also in the paper with respect to substrate technology and to the FC assembly
Electronic Components and Technology Conference, 2006. Proceedings. 56th;
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[show abstract]
[hide abstract]
ABSTRACT: The increasing demands on future electronic products require more efficient system integration technologies. Especially the package density gap at board level with the high integrated circuits (ICs) on the one hand and the discrete passive components on the other has to be closed by new packaging technologies which integrate the passive components into the substrate, an interposer or the IC itself. This paper presents investigations for the common integration of inductors, resistors, capacitors as well as passive filter structures in a thin film build up, based on copper and benzocyclobutene (BCB). Technologies from wafer level packaging were adapted for manufacturing of the integrated components. The examinations were carried out with special focus on integrated coils and passive filter structures. Build up, design, processing as well as results of the electrical characterization of the integrated components are described in detail. Furthermore, an integrated passive device (IPD) for application as a filter element in the Bluetooth band is presented
Fraunhofer IZM.
