J. Edholm

Publications (3)3.84 Total impact

• Article: Reliability study of ultra-thin gate oxides on strained-Si/SiGe MOS structures

  J..B. Varzgar, M. Kanoun, S. Uppal, S. Chattopadhyay, Y.L. Tsang, E. Escobedo-Cousins, S.H. Olsen, A. O’Neill, P.-E. Hellström, J. Edholm, M. Östling, K. Lyutovich, M. Oehme, E. Kasper
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  ABSTRACT: The reliability of gate oxides on bulk Si and strained Si (s-Si) has been evaluated using constant voltage stressing (CVS) to investigate their breakdown characteristics. The s-Si architectures exhibit a shorter life time compared to that of bulk Si, which is attributed to higher bulk oxide charges (Qox) and increased surface roughness in the s-Si structures. The gate oxide in the s-Si structure exhibits a hard breakdown (HBD) at 1.9×104 s, whereas HBD is not observed in bulk Si up to a measurement period of 1.44×105 s. The shorter lifetime of the s-Si gate oxide is attributed to a larger injected charge (Qinj) compared to Qinj in bulk Si. Current–voltage (I–V) measurements for bulk Si samples at different stress intervals show an increase in stress induced leakage current (SILC) of two orders in the low voltage regime from zero stress time to up to 5×104 s. In contrast, superior performance enhancements in terms of drain current, maximum transconductance and effective channel mobility are observed in s-Si MOSFET devices compared to bulk Si. The results from this study indicate that further improvement in gate oxide reliability is needed to exploit the sustained performance enhancement of s-Si devices over bulk Si.
  Materials Science and Engineering B 12/2006; 135(3):203. · 1.52 Impact Factor
• Source

  Available from: Steve Bull

  Article: Control of Self-Heating in Thin Virtual Substrate Strained Si MOSFETs

  S.H. Olsen, E. Escobedo-Cousin, J.B. Varzgar, R. Agaiby, J. Seger, P. Dobrosz, S. Chattopadhyay, S.J. Bull, A.G. O'Neill, P.-E. Hellstrom, J. Edholm, M. Ostling, K.L. Lyutovich, M. Oehme, E. Kasper
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  ABSTRACT: This paper presents the first results and analysis of strained Si n-channel MOSFETs fabricated on thin SiGe virtual substrates. Significant improvements in electrical performance are demonstrated compared with Si control devices. The impact of SiGe device self-heating is compared for strained Si MOSFETs fabricated on thin and thick virtual substrates. This paper demonstrates that by using high-quality thin virtual substrates, the compromised performance enhancements commonly observed in short-gate-length MOSFETs and high-bias conditions due to self-heating in conventional thick virtual substrate devices are eradicated. The devices were fabricated with a 2.8-nm gate oxide and included NiSi to reduce the parasitic series resistance. The strained layers grown on the novel substrates comprising 20% Ge did not relax during fabrication. Good on-state performance, off-state performance, and cross-wafer uniformity are demonstrated. The results show that thin virtual substrates have the potential to circumvent the major issues associated with conventional virtual substrate technology. A promising solution for realizing high-performance strained Si devices suitable for a wide range of applications is thus presented
  IEEE Transactions on Electron Devices 09/2006; 53(9):2296 - 2305. · 2.32 Impact Factor
• Conference Proceeding: Strained-Si NMOSFETs on thin 200 nm virtual substrates

  P.-E. Hellstrom, J. Edholm, M. Ostling, S. Olsen, A. O'Neill, K. Lyutovich, M. Oehme, E. Kasper
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  ABSTRACT: First Page of the Article
  Semiconductor Device Research Symposium, 2005 International; 02/2005