F.Y. Han

National Sun Yat-sen University, Kaohsiung, Kaohsiung, Taiwan

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Publications (11)1.85 Total impact

  • Conference Proceeding: A dual-conversion zero-IF design for DVB-H RF tuner applications
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    ABSTRACT: This paper presents the RFIC design that uses TSMC 0.18 ¿m CMOS process to implement a DVB-H RF tuner. The design is based on a dual-conversion zero-IF architecture. Compared to the conventional up-down architecture, this adopted architecture has the advantages of no IF SAW filter but still can easily reject the image signal. To pass the protection-ratio specification, the most challenging one in DVB-H tuner specifications, this RFIC design is featured with a broadband LNA with a variable gain, a highly linear up-converting mixer with a double-balanced resistive FET architecture, and a high-linearity quadrature demodulator with the transconductance linearization technique. The important CW measured results is summarized as follows: The DC power consumption is 70.2 mW. From 50 to 860 MHz, the maximum gain varies from 19.7 to 29.2 dB with an adjustable attenuation more than 50 dB. Under the maximum-gain condition, the noise figure varies from 4.6 to 12 dB, and the OIP3 varies from 0.1 to 2.2 dBm. The CW test results agree quite well with the link-budget analysis results.
    Microwave Conference, 2009. APMC 2009. Asia Pacific; 01/2010
  • Conference Proceeding: Packaging effects on a CMOS low-noise amplifier: Flip-chip versus wirebond
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    ABSTRACT: A model-based study is presented to compare the effects between flip-chip and wirebond package on a low-noise amplifier (LNA) in a 2.4 GHz CMOS wireless local area network (WLAN) receiver. To construct the package electrical models, specific modeling dies are designed to help extract the equivalent-circuit parameters from measured S-parameters for chip-package interconnects. Furthermore, the ground proximity effects on on-chip spiral inductors in a flip-chip package are also modeled in this study. Excellent agreement between modeling and measurement is obtained up to 20 GHz for a 64-pin flip-chip ball grid array (FCBGA) package and a 64-pin wirebond quad flat nonlead (QFN) package. In practical applications, the established package models are used to predict the RF specifications of a 2.4 GHz CMOS LNA when packaged in the above two packages. Consequently, chip-package co-simulation achieves a good agreement with measurement, and thus can persuasively account for the effects caused by the two different packages.
    Electronic Components and Technology Conference, 2009. ECTC 2009. 59th; 06/2009
  • Article: A Rigorous Study of Package and PCB Effects on W-CDMA Upconverter RFICs
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    ABSTRACT: A Volterra-series analysis is presented to study the package and printed circuit board (PCB) effects on the linearity of two wideband code-division multiple-access upconverter RF integrated circuit (RFIC) designs. The first design adopts a recently popular micromixer with a class AB input stage. The second design is based on a commonly used Gilbert mixer with emitter degeneration. Both upconverter RFICs are designed to have the same adjacent channel power ratio (ACPR) in the chip-level simulation. After fabrication, packaging, and testing on the PCB, the micromixer-based design consumes less direct current, but causes more degradation in the ACPR performance due to the influence of package and PCB when compared to the Gilbert mixer-based design. The theoretical analysis indicates that the micromixer-based upconverter RFIC is rather susceptible to the parasitic effects from the ground interconnect and, therefore, it needs a better package solution with a lower ground inductance for practical use. Comparison between theory and measurement shows good agreement in predicting the variations of conversion gain and ACPR due to the presence of the package and PCB
    IEEE Transactions on Microwave Theory and Techniques 11/2006; · 1.85 Impact Factor
  • Conference Proceeding: A Rigorous Comparison of Package and PCB Effects on Micromixer- and Gilbert Mixer-Based Upconverter MMICs
    F.Y. Han, J.M. Wu, T.S. Horng
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    ABSTRACT: A Volterra series analysis is presented to study the package and printed circuit board (PCB) effects on the linearity of two W-CDMA upconverter MMIC designs. The first design adopts a recently popular micromixer with class-AB input stage. The second design is based on a commonly used Gilbert mixer with emitter degeneration. Both upconverter MMICs are designed to have the same adjacent channel power ratio (ACPR) in the chip-level simulation. After fabrication, packaging and testing on PCB, the micromixer-based design consumes less direct current but causes more degradation in the ACPR performance due to the influence of package and PCB when compared to the Gilbert mixer-based design. The analysis indicates that the micromixer-based upconverter MMIC is rather susceptible to the parasitic effects from the ground interconnect, and therefore it needs a better package solution with a lower ground inductance for practical use
    Microwave Conference, 2006. 36th European; 10/2006
  • Conference Proceeding: Direct-conversion quadrature modulator MMIC design with a new 90 degrees phase shifter including package and PCB effects for W-CDMA applications
    J.M. Wu, F.Y. Han, T.S. Horng, J. Lin
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    ABSTRACT: A 1.9 GHz GaAs direct-conversion quadrature modulator MMIC adopting a new technique to generate 90°; phase shift for W-CDMA applications is presented. This 90° phase shifter achieves a phase error less than 1.5° from 1.8 GHz to 2 GHz with extremely low implementation loss. The package and PCB interconnects are also analyzed using the 3-D EM simulation tool and transformed into the equivalent-circuit elements for co-simulation with the designed modulator MMIC. The dominant package and PCB effect is to degrade the sideband suppression, which is disadvantageous to the modulation quality.
    Microwave Conference, 2005 European; 11/2005
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    Conference Proceeding: A novel closed-form approach for comparing the Q-factor responses between the asymmetric and symmetric on-chip inductors
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    ABSTRACT: This paper proposes an equivalent transmission-line circuit for on-chip inductors and derives the quality (Q) factor response in terms of the transmission-line circuit parameters in closed form. The derived formulas are general and suitable for all kinds of on-chip inductors to account for their frequency dependences of Q factors. For demonstration, a series of asymmetric inductors and another series of same valued symmetric inductors have been fabricated on the same silicon substrate. The measured Q-factor responses for both kinds of inductors agree quite well with the formula predictions. The symmetric inductors have a higher equivalent characteristic impedance so as to correspond to a higher peak Q-factor frequency than the asymmetric inductors. The presented formulas can also uniquely distinguish the improvement in Q-factor responses due to the reduction of conductor loss or dielectric loss.
    Gallium Arsenide and Other Semiconductor Application Symposium, 2005. EGAAS 2005. European; 11/2005
  • Conference Proceeding: Chip-Package-Board Codesign of Highly Linear 3G-CDMA Upconverter Modules
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    ABSTRACT: First Page of the Article
    Electronic Components and Technology Conference, 2005. Proceedings. 55th; 07/2005
  • Conference Proceeding: Polar modulation-based RF power amplifiers with enhanced envelope processing technique
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    ABSTRACT: First Page of the Article
    Microwave Conference, 2004. 34th European; 11/2004
  • Conference Proceeding: Package and PCB effects on linearity of a micromixer-based W-CDMA upconverter
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    ABSTRACT: First Page of the Article
    Microwave Conference, 2004. 34th European; 11/2004
  • Conference Proceeding: Synthesis of a super broadband model for on-chip spiral inductors
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    ABSTRACT: A modified T-section equivalent circuit is proposed to model on-chip spiral inductors with extremely large bandwidth. This developed model combines a five-element modified T-section to include up to half-wavelength long transmission-line effects, and parallel and series feedback resonators to account for higher-order resonances present in the coil-coupling and ground-return paths. The modeled S parameters show excellent agreement with measured results over the entire measurement frequency range of 20 GHz and 50 GHz for a series of planar spiral inductors implemented on silicon and InGaAs substrates, respectively. The effective modeling bandwidth is at least several times larger than in a conventional PI-section model.
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers. 2004 IEEE; 07/2004
  • Conference Proceeding: Implementation of a W-CDMA direct-conversion IQ modulator module including evaluation of chip-package-board interactions
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    ABSTRACT: This paper presents a W-CDMA direct-conversion IQ modulator MMIC design that employs a new technique to generate the 90deg phase shift with low implementation loss. The package and PCB effects on the implemented IQ modulator MMIC when further developed as a board module are studied. The package and PCB interconnects are analyzed using the 3-D EM simulation tool and transformed into the equivalent-circuit elements for co-simulation with the IQ modulator MMIC. The degradation of error vector magnitude and sideband suppression due to the presence of package and PCB can be well predicted by the co-simulation results and then verified by the final measurement results
    Electronic Components and Technology Conference, 2006. Proceedings. 56th;