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ABSTRACT: Transient capacitances were numerically investigated for Ge / Si heteronanocrystal memories. Flatband voltage shifts (ΔV<sub> fb </sub>) were obtained. The results suggest that the Ge / Si heteronanocrystal memories have significantly longer data retention compared with the memories embedding Si nanocrystals only. It is also found that larger heteronanocrystal leads to longer retention, larger device capacitance, and smaller ΔV<sub> fb </sub> .
Journal of Applied Physics 03/2007; · 2.17 Impact Factor
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ABSTRACT: Transient processes of Ge/Si hetero-nanocrystal floating gate memories are simulated numerically. Compared with Si nanocrystal memories, Ge/Si hetero-nanocrystal memories show similar writing and erasing efficiency with a weaker writing saturation and markedly improved retention characteristics.
04/2006; 2050.
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ABSTRACT: The Ge/Si hetero-nanocrystal as a floating gate has been discussed and improved. The charge stored in the quantum well formed by SiO<sub>2</sub>-Ge-Si has to be thermally activated to the valence band of the Si nanocrystal before it can leak to the substrate which significantly reduces the leakage current from the charge storage node (nanocrystal) to the substrate. The simulation shows that the flash memory with Ge-Si (3 nm/3 nm) hetero-nanocrystal floating gates possesses a retention time of about ten years with a tunneling oxide of only 2 nm. Both writing and erasing speeds are fast in the Ge-Si hetero-nanocrystal memories, which is similar to that in the memory based on Si nanocrystals only.
IEEE Transactions on Nanotechnology 02/2006; · 2.29 Impact Factor
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Device Research Conference Digest, 2005. DRC '05. 63rd; 02/2005
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Semiconductor Device Research Symposium, 2005 International; 02/2005
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ABSTRACT: After the proposal of nanocrystal floating gate memory by Tiwari, tremendous effort has been made to improve the device performance of a memory containing nanocrystal floating gate, including semiconductor nanocrystals (Si, Ge et al.), metal dot (W, Ni, Au, Pt, Ag et al.), dielectric nanocrystals (Al<sub>2</sub>O<sub>3</sub>, HfO<sub>2</sub> and Si<sub>4</sub>N<sub>3</sub> et al.) and Ge/Si hetero-nanocrystals. In this work, we will report for the first time titanium silicide/Si hetero-nanocrystal floating gate memory
Device Research Conference Digest, 2005. DRC '05. 63rd; 02/2005
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ABSTRACT: The transient process of the programming and erasing is very important for a nanocrystal-floating-gate flash memory. In this work, a computer simulation was carried out to investigate the charging, retention and erasing processes of our proposed Ge/Si hetero-nanocrystal floating gate flash memory. The transient gate current, the transient drain current and the average charge in one dot were simulated respectively. Evident hysteresis features can be observed in the transient processes in a voltage-sweeping measurement mode. While measuring the transient process in a constant voltage mode, the time decay of transient current and charge are weakened if Ge is used on the Si dot, indicating a longer retention time for Ge/Si-floating-gate flash memory.
MRS Proceedings. 12/2003; 832.
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ABSTRACT: Simulations of threshold voltage shift of a p-channel Ge/Si heteronanocrystal floating gate memory device were carried out using both a numerical two-dimensional Poisson–Boltzmann method and an equivalent circuit model. The results show that the presence of a Ge dot on top of a Si dot significantly prolongs the retention time of the device, indicated by the time decay behavior of the threshold voltage shift. Both methods lead to consistent results that an increase in the thickness of either the Si dot or Ge dot will result in a reduction of the threshold voltage shift. Additionally, the threshold voltage shift increases significantly as the heteronanocrystal density increases. Nevertheless, only a weak dependence of threshold voltage shift on the tunneling oxide thickness was found. © 2005 American Institute of Physics.
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ABSTRACT: A nanocrystal memory using CoSi 2 /Si hetero-nanocrystals as floating gate was proposed. Numerical investigations on the writing, erasing and retention were performed. The hetero-structure provides an extra quantum well for the charge to achieve much longer reten-tion time while maintains a writing/erasing speed similar to that of Si nanocrystal memory.
2050.
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ABSTRACT: Self-assembled cobalt (Co) nanocrystals on ultra-thin silicon dioxide layer were fabricated by in situ annealing Co ultrathin films deposited with Co effusion cell in a molecular-beam-epitaxy chamber. The resultant nanocrystals obtained at the optimized annealing temperature are around 3–4 nm in diameter with dot density of about 1 × 1012 cm−2. The metal–oxide–semiconductor capacitors containing Co nanocrystals exhibit much longer retention times than a Si nanocrystal memory with the same tunneling oxide thickness. This study suggests that Co nanocrystal should be an excellent alternative to replace Si nanocrystal as floating gates for future nonvolatile flash-type memory application.
Solid-State Electronics.
