Changwook Yoon

Korea Advanced Institute of Science and Technology , Seoul, Seoul, South Korea

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Publications (13)2.51 Total impact

  • Article: Modeling and Analysis of Power Supply Noise Imbalance on Ultra High Frequency Differential Low Noise Amplifiers in a System-in-Package
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    ABSTRACT: In this paper, we analyze the power supply noise imbalance and its effects on simultaneous switching noise coupling to an ultra high frequency differential low noise amplifier (LNA) in a system-in-package (SiP) through an off-chip power distribution network (PDN). On and off-chip sources of power supply noise imbalance in a LNA in a SiP were analyzed. A simultaneous switching noise coupling coefficient for the differential LNA output caused by power supply noise imbalance was simulated through co-modeling a hierarchical on and off-chip PDN. The simulation results were validated by measuring the simultaneous switching noise coupling voltage at the differential LNA output. Further validation of four types of a LNA with different PDN designs demonstrates that simultaneous switching noise coupling to the differential LNA output caused by power supply noise imbalance highly depends on the design of the PDN of the SiP.
    IEEE Transactions on Advanced Packaging 09/2010; · 1.12 Impact Factor
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    Conference Proceeding: Suppression of power/ground noise using meshed-planar electromagnetic bandgap (MP-EBG) structure for Ultra-Wideband (UWB) System-in-Package (SiP)
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    ABSTRACT: In this paper, we propose the meshed-planar electromagnetic bandgap (MP-EBG) structure with a meshed planar surface embedded in the package power plane to suppress a power/ground noise in the frequency range from 3.1 GHz to 10.6 GHz, also known as the frequency band of Ultra-Wideband (UWB). The MP-EBG structure has two different EBG surfaces. One surface is a mushroom-like surface embedded between a package power and a ground plane and the other surface is a meshed planar structure embedded in a package power plane. The MP-EBG structure enables to enhance the bandwidth of the stopband in the limited package area and achieve the 8.7 GHz stop bandwidth with -30 dB isolation.
    Electromagnetic Compatibility (EMC), 2010 IEEE International Symposium on; 08/2010
  • Conference Proceeding: A 6.4Gbps on-chip eye opening monitor circuit for signal integrity analysis of high speed channel
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    ABSTRACT: In this paper, an on-chip eye opening monitor circuit has been proposed with 4 ps time and 4 mv voltage resolutions for analyzing signal integrity of on-chip high speed channel. The proposed eye opening monitor circuit can detect the maximum 6.4 Gbps data rate and give eye diagrams depending on on-chip high speed channel conditions. The performance of the proposed eye opening monitor circuit was verified by using a general Spice simulations and showed the variations of eye diagram of 6.4 Gbps random data when on-die terminations of on-chip high speed channel was changed from 50 ohm to 80 ohm.
    Electromagnetic Compatibility, 2008. EMC 2008. IEEE International Symposium on; 09/2008
  • Conference Proceeding: Power/ground noise immunity test in wireless and high-speed UWB communication system
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    ABSTRACT: This paper presents a wireless and high-speed transceiver system for Ultra-Wideband (UWB) communication with a high noise immunity. A proposed transceiver system has a high-speed data transmission up to 130 Mbps. Then, the measurement setup for the noise immunity test is introduced. Also, in order to demonstrate a noise immunity of the system, timing jitter, accumulated waveform, and bit error rate (BER) are measured in the presence of a power/ground noise with various frequencies or amplitudes. The numerous measurement results help to understand the relationship between the power/ground noise and the noise immunity of the proposed transceiver system.
    Electromagnetic Compatibility, 2008. EMC 2008. IEEE International Symposium on; 09/2008
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    Article: Design of a Low-Noise UWB Transceiver SiP
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    ABSTRACT: Ultrawideband (UWB) wireless communication systems are emerging as a promising solution for high-data-rate and short-distance wireless data transmission. In this article, we introduce a low-noise UWB transceiver SiP design for a compact implementation in a small mobile platform. The SiP's transmitter chip has a fully digital circuit implementation with a passive band-pass filter to meet a US Federal Communications Commission (FCC) regulation, and the receiver chip has a noncoherent architecture. To reduce noise generation and coupling in the densely integrated design, we considered signal integrity issues in the high-frequency channel and power integrity issues on the power distribution network (PDN) in the SiP substrate. Circuit-level and full-wave simulations confirm that the proposed design methodology improves signal integrity and power integrity. The UWB transceiver SiP consists of a fully digital transmitter system and a noncoherent receiver system.
    IEEE Design and Test of Computers 02/2008; 25(1):18-28. · 1.39 Impact Factor
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    Conference Proceeding: Analysis of the Effect of AC Noise on DC Bias of VGA for UHF RFID using Chip-package Co-modeling and Simulation
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    ABSTRACT: Ever since radio frequency identification (RFID) was first introduced, the demand for smaller and low-power-consuming RFID system never stopped increasing. Many researchers dealt and successfully reduced the size. But as the size of and RFID system is reduced, the noise coupling between blocks became more severe. Especially, when noise is coupled to variable gain amplifier (VGA) block, the output may be damaged and lead to failure in reading tags. But finding and simulating sources and effect of noise is very complicated and time consuming. Thus, it is crucial to model and simplify the system. In this paper, the noise and its effect on VGA for UHF RFID is modeled, simulated, and modeled.
    Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th; 01/2008
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    Conference Proceeding: Analysis of the Effect of Digital Power Ground Noise on Active Balun in UHF RFID SiP
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    ABSTRACT: In recent, as the demand for integrating radio frequency identification (RFID) system to mobile electric appliances increases, there has been strong needs for small size, light weight, and low power consumption in RFID system. To reduce size of RFID system, system-in-package (SiP) technology has been applied to RFID system. However, there are many problems, as RFID system is integrated into a single package. One of those problems is noise coupling from noisy power/ground of digital logic circuits to noise sensitive circuits, such as RF and analog circuits. Not only package power/ground noise coupling but also on-chip substrate noise coupling could degrade the performance of RF circuit. Therefore, it is essential to analyze and solve various noise coupling problems in RFID SiP, to guarantee the performance of it. In this paper, we have analyzed the effect of digital power/ground noise coupling on the performance of active balun through modeling and simulation including chip and package level. Moreover, efficient LC filter is applied to a RF circuit to minimize package power/ground noise coupling to the RF circuit.
    Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th; 01/2008
  • Article: Design of a Low-Noise UWB Transceiver SiP.
    IEEE Design & Test of Computers. 01/2008; 25:18-28.
  • Article: Co-modeling, Experimental Verification, and Analysis of Chip-Package Hierarchical Power Distribution Network.
    IEICE Transactions. 01/2008; 91-C:595-606.
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    Conference Proceeding: Design of UWB Transceiver SiP for Short Range Communication
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    ABSTRACT: Since UWB system uses a wide frequency range from 3.1 GHz to 5.1 GHz, package parasitic effects have been a hot issue which affects system malfunction. To prevent such malfunction, SiP technology is adjusted considering not only a circuit performance but various design issues in a package from viewpoints of signal integrity and power integrity. Furthermore, UWB band-pass filter is embedded into a package to reduce a complexity of transmitter circuit and the power consumption. Designed UWB SiP performance is verified by the measurement in time domain.
    Electromagnetic Compatibility, 2007. EMC 2007. IEEE International Symposium on; 08/2007
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    Conference Proceeding: Noise Isolation Modeling and Experimental Validation of Power Distribution Network in Chip-Package
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    ABSTRACT: This paper models the chip and the package power distribution network in the simplified SPICE-level. The model is successfully validated by experiments using Vector Network Analyzer. By using the SPICE-level model, the noise isolation between the noise current source at the chip and the power distribution network at the package is analyzed from 1 MHz to 3 GHz. The contribution of each part in the power distribution network is also analyzed by experiments. The transfer impedances are simulated and measured the power distribution network between the chip and the package varying with the wire- bond and the on-package decoupling capacitor, case by case.
    Electromagnetic Compatibility, 2007. EMC 2007. IEEE International Symposium on; 08/2007
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    Conference Proceeding: Design of LTCC-based ultra-wideband transmitter SiP using CMOS impulse generator
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    ABSTRACT: In this paper, a low-cost, compact form factor UWB impulse transmitter module is presented for impulse radio communication and radar. It consists of an impulse generator on chip, a compact UWB band pass filter (BPF) for impulse shaping, an amplifier in package, and a printed planar UWB antenna on board. The small BPF which has a low insertion loss is manufactured using low temperature cofired ceramic (LTCC) process. The performance of designed UWB transmitter is measured with UWB antenna in common communication environment. Measured results show that the designed UWB transmitter can be successfully used for the application of high precision UWB sensors between 3.1 GHz and 9GHz.
    Electronics Packaging Technology Conference, 2006. EPTC '06. 8th; 01/2007
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    Article: Analysis of DLL Jitter Affected by Power Supply Noise on Power Distribution Network
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    ABSTRACT: In this paper, we analyze a noise-to-jitter transfer function on DLL (Delay Locked Loop) considering power supply noise effects on PDN (Power Distribution Network). Noise-to-jitter transfer function of DLL circuit can be estimated by using single-tone power supply noise analysis. Noise transfer function through the PDN can be obtained from transfer impedance of hierarchical PDN using TLM (Transmission Line Matrix) method and 2.5D PCB simulator. Therefore, the power supply noise-to-jitter transfer function considering PDN effect can be acquired to combine the two previous transfer functions. Finally, we can verify the methods to reduce peak value of jitter transfer function using an optimized bias filter capacitor in DLL circuit and designed low inductance of hierarchical PDN.