[Show abstract][Hide abstract] ABSTRACT: A novel fusion memory is proposed as a new paradigm of silicon based memory technology. An O/N/O gate dielectric and a floating body are combined with a FinFET, and the non-volatile memory (NVM) and high speed capacitorless 1T-DRAM are performed in a single transistor. A nitride trap layer is used as an electron storage node for NVM, and hetero-epitaxially grown Si/Si<sub>1-x</sub>Ge<sub>x</sub> energy band engineered bulk substrates allow excess hole storage for 1T-DRAM. Highly reliable 1T-DRAM and NVM are demonstrated.
Electron Devices Meeting, 2008. IEDM 2008. IEEE International; 01/2009
[Show abstract][Hide abstract] ABSTRACT: A novel dopant segregated Schottky barrier (DSSB) SONOS device as a form of double-gate (DG) is demonstrated for NOR flash memory applications. The DSSB also applies to all-around-gate (AAG) SONOS devices. The source side injection caused by sharp energy band bending in the DSSB device results in a high-speed programming (Vth shift of 4.2V @ 320 ns) at a low program bias (Vgs/Vds=7V/3V). Moreover, faster program speed in a narrower fin width (Wfin) due to its low parasitic resistance and enhanced gate controllability is achieved. Drain disturbance-free characteristics in a programmed cell are confirmed as well.
[Show abstract][Hide abstract] ABSTRACT: A FinFET-based unified-RAM (URAM) using the band offset of Si/SiC is demonstrated for the fusion of a non-volatile memory (NVM) and capacitorless 1T-DRAM operation. An oxide/nitride/oxide (O/N/O) gate dielectric and a floating body caused by the band offset are combined in a bulk FinFET to allow two memory operations in a single transistor. The device is fabricated on an epitaxially grown Si/SiC substrate and its process is fully compatible with a conventional bulk FinFET SONOS. Highly reliable NVM and high speed 1T-DRAM operation are confirmed in a single URAM cell.