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J. Heidrich,
D. Brenk, J. Essel,
M. Heinrich,
G. Hofer,
G. Holweg,
S. Schwarzer,
J. Meyer,
R. Herschmann,
B. Geck,
R. Weigel,
G. Fischer
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ABSTRACT: This paper at first illustrates implementation aspects and measurement results of a subcomponent for a multistandard RF identification (RFID) transponder. It is intended to be a common reference cell, both for basic UHF requirements and advanced application fields like local positioning and wireless sensing. Different single circuit topologies shown in previous studies or literature and their applicability for that RFID system are evaluated. After that, measurement results of two final circuit configurations, including a newly designed RC oscillator with metal-metal capacitors, are discussed and compared. Layout aspects for reducing the process variations and low power consumption are demonstrated. Simulation results show border conditions for the power supply of the transponder on chip level. Moreover, distance measurements with our first complete transponder compliant to the electronic product code protocol are shown. It includes the newly presented reference cells and other necessary transponder components. All chips are designed based on a 0.13-μm CMOS technology.
IEEE Transactions on Microwave Theory and Techniques 04/2011; · 1.85 Impact Factor
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ABSTRACT: This paper presents the design of a highly efficient CMOS rectifier for passive communication systems. The integrated rectifier is implemented in a 0.13 μm CMOS technology. The measured overall RF-to-DC power conversion efficiency for a DC output power of 10 μW (1V and 10 μA) is about 25%. The maximum efficiency for a DC output voltage of 1V is about 43% at UHF and the efficiency of the rectifier at -15 dBm RF input power is still 20%. This rectifier is using a self threshold cancelation technique to enhance the efficiency significantly.
Microwave Conference Proceedings (APMC), 2010 Asia-Pacific; 01/2011
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ABSTRACT: A successive approximation (SAR) ADC is presented, whose components make use of effective ultra low-power techniques to enable wireless sensing with passive and semi-passive sensor nodes. Compared to prior publications new layout enhancements were applied to the integrated capacitive DAC array to gain less distortion caused by mismatch. In addition it is shown, that the digital circuit parts consume most of the available energy. Therefore digital near-threshold operation is proposed to minimize their consumption. The applicability of the ADC is demonstrated in an UHF RFID System. Within this system it is applied as core of a sensor interface integrated into a passive multi-standard RFID tag. The EPC protocol used for communication ensures the compatibility with standard UHF RFID readers while the sensor data is acquired using custom commands. The ADC consumes only 525 nA at 40kSps and 0.9 V supply voltage. Under these conditions an ENOB of 7.23 is reached and thus a FOM of 79 fJ/conversion-step.
Sensors, 2010 IEEE; 12/2010
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ABSTRACT: This paper presents a low-power multi-standard frontend for passive wireless RFID based sensor networks. The CMOS only frontend is implemented in a 0.13 μm CMOS technology. It includes a highly efficient rectifier for UHF and HF to supply the digital logic, the integrated sensor interface and the necessary auxiliary circuits like a low-power voltage/current reference and the local oscillator. Furthermore the complete sensor enhanced RFID transponder is able to communicate with a standard EPC HF and UHF RFID reader. The DC power consumption of the analog frontend components is about 3 μA. The measured overall RF-to-DC power conversion efficiency of the complete analog frontend for a DC output power of 10 μW is about 17% at -11 dBm RF input power for UHF. To the authors' knowledge, this is the highest UHF efficiency achieved by a multi-standard sensor tag. The efficiency of the HF frontend at -4 dBm RF input power and 1 V V<sub>DD</sub> is about 10%. The maximum efficiency of the frontend is about 17% at HF.
Sensors, 2010 IEEE; 12/2010
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ABSTRACT: This paper evaluates the implementation of a Round-Trip-of-Flight (RToF) technique into a UHF transponder. Different possible transponder architectures are investigated and measurement results for a passive design are shown at circuit level. The chip is designed based on a 0.13 μm CMOS technology.
ICECom, 2010 Conference Proceedings; 10/2010
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ABSTRACT: This paper briefly reviews common state-of-the-art architectures of voltage regulators and their applicability to RFID. After that the design of a Low Drop-out (LDO) regulator using active resistances is presented, especially suitable for RFID applications. The chip is designed based on a 0.13 μm CMOS technology.
Computational Technologies in Electrical and Electronics Engineering (SIBIRCON), 2010 IEEE Region 8 International Conference on; 08/2010
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ABSTRACT: This paper describes the design of a current mode bandgap for RFID applications. Its temperature compensation network can be set between two states which enables different compensation criteria. In the first state the temperature dependent behavior is optimized around ambient temperature, in the other state a better adaption at the higher temperature range can be achieved. The chip is designed in a 0.13 μm CMOS technology. It was developed at the Institute for Electronics Engineering within the scope of a research project supported by the Bavarian Research Foundation.
Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International; 06/2010
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ABSTRACT: This article has offered a brief excerpt of the basic requirements and current development trends in (passive) RFID systems in different application areas. Even after reaching a sophisticated state of development, RFID technology is still dependent on sufficient acceptance at the market. Conventional bar code systems lack programmability, have low storage capability, and need a line-of-sight connection to the reader. If the fall in prices for low-cost tags continues, barcodes could be largely replaced in some years. In this case, additional features like positioning or sensing will become even more attractive for commercial and industrial application fields.
IEEE Microwave Magazine 06/2010; · 2.11 Impact Factor
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ABSTRACT: This chapter covers all aspects that have to be considered for building highly efficient passive RFID tags with special abilities.
Within a concrete project we are currently implementing such a tag. Besides the mandatory RF frontend and digital baseband
processing it incorporates functionalities for multistandard communication, localization and sensing. Ultra low-power techniques
enable these circuits to be implemented in a single chip without any other power supply than the RF field. The possibility
to produce such RFID tags in high volumes and at low costs is a main objective of our project. Manifold monitoring solutions
would profit from maintenancefree and ubiquitous sensor-data acquisition with position information using cheap, disposable
RFID tags.
04/2010: pages 125-150;
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ABSTRACT: This paper presents a highly efficient analog multistandard frontend for passive sensor-enabled RFID transponders. The CMOS only frontend is implemented in a 0.13 ¿m CMOS technology. The measured overall RF-to-DC power conversion efficiency of the analog frontend for a DC output power of 10 ¿W is about 7% and the maximum efficiency is about 15% at UHF. An implemented sensor interface consumes 1.4 ¿A at 1V supply. This interface contains an ultra low-power successive approximation ADC that uses the capacitive charge redistribution technique for its integrated DAC.
Microwave Conference, 2009. APMC 2009. Asia Pacific; 01/2010
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ABSTRACT: RFID is used today in many fields of every day life like access control, anti-theft protection or logistics. Within this article a short overview of the basic RFID principles and the EPC protocol flow is given at first. Afterwards new de-sign approaches for RFID systems within the scope of the research project RFID-S are presented.
01/2010; 8:263-273.
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ABSTRACT: In this paper a low voltage RC oscillator for standard RFID applications and local positioning is presented. Its bias current is provided by a current-mode bandgap whose reference voltage can also be used for enhanced transponder applications like sensing. The chip is designed in a 0.13 ¿m CMOS technology with p substrate. It was developed at the Institute for Electronics Engineering within the scope of a research project supported by the Bavarian Research Foundation.
Microwaves, Communications, Antennas and Electronics Systems, 2009. COMCAS 2009. IEEE International Conference on; 12/2009
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ABSTRACT: This paper presents a generic sensor interface built in a 0.13 ¿m CMOS process capable of being applied in passive HF & UHF RFID Tags without any additional power supply. The sensor interface contains an ultra low-power successive approximation ADC that uses the capacitive charge redistribution technique for its integrated DAC. An on-chip temperature sensor and up to three additional sensor signals can be applied to the ADC. A conversion rate of 100 kSps is reached while consuming less than 1.5 ¿A at 0.9 Volt supply voltage.
Sensors, 2009 IEEE; 11/2009
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ABSTRACT: The passive radio frequency identification (RFID) presents a key technology for unattended wireless networks. To achieve a higher reading range and to improve the operational reliability of passive RFID tags, the design of integrated circuits with an ultra low power consumption and novel concepts for high-efficiency energy harvesting are required. This paper presents a highly efficient analog frontend for passive UHF RFID transponders. This frontend includes a multistage Schottky rectifier, a backscatter modulator, an ASK demodulator, a current reference source, and power limiting circuits. These building blocks are implemented in a 0.14 mum CMOS technology. The measured overall RF-to-DC conversion efficiency of the analog frontend for a DC output power of 10 muW (1 V and 10 muA) is about 20%. The DC power consumption of the analog building blocks is about 1 muW for a supply voltage of 1 V.
Wireless Sensing, Local Positioning, and RFID, 2009. IMWS 2009. IEEE MTT-S International Microwave Workshop on; 10/2009
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ABSTRACT: This paper gives an overview on current design techniques for ultra low-power applications in passive UHF RFID tags. Specialized sensor data acquisition methods are discussed as well as generic sensor interfaces and their building blocks. Analog to digital converters working in ranges of less than 100 fJ/conversion-step are presented which can be applied as data converters for generic interfaces. Example calculations and simulations on single circuits are made to prove operability at UHF RFID conditions of only several muA available at 1 V supply voltage.
Wireless Sensing, Local Positioning, and RFID, 2009. IMWS 2009. IEEE MTT-S International Microwave Workshop on; 10/2009
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ABSTRACT: This paper describes the theory of distance measurements with passive UHF transponders using the principle of modulated backscattering. The method was evaluated with the analogue frontend of a passive RFID chip for the UHF range. The chip was designed in a 0.14mum CMOS technology.
Wireless Sensing, Local Positioning, and RFID, 2009. IMWS 2009. IEEE MTT-S International Microwave Workshop on; 10/2009
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ABSTRACT: This paper presents a realization of an ultra low power ring oscillator in 0.14 mum bulk CMOS technology. The application field for this oscillator is the clock generation for a baseband processor of a passive ultra high frequency (UHF) radio frequency identification (RFID) transponder. This technology will play an important role in the field of automatic identification. The paper contains simulation and measurement results for tuning range, cycle to cycle jitter and power consumption with regarding to the control current and supply voltage. The circuit was designed and fabricated by using 0.14 mum bulk CMOS technology.
Frequency Control Symposium, 2008 IEEE International; 06/2008
