Dae Ro Lee

Sungkyunkwan University, Sŏul, Seoul, South Korea

Are you Dae Ro Lee?

Claim your profile

Publications (6)0 Total impact

  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: In order to analyze and recognize objects in binary images, two primary operations are required. First, component labeling is performed to identify objects with unique labels and to produce a labeled image. And boundary tracing is performed to form the ordered list of boundary position of object; which is a contour. These procedures are fundamental factors for image analysis. However, component labeling cannot be easily implemented in real-time because of the large size of image data and the high speed of image transition. In order to trace the object boundary every object's location are required, so boundary tracing is dependent on the component labeling which can determine the location of all objects. Therefore, we combine these two procedures in one dedicated hardware system. This system comprises the labeling component and tracing component. The labeling component identifies objects and produces the labeled image. By using this labeled image, the tracing component traces the boundary of identified object. Thus, the performance and efficiency of the binary image application can be increased. The system is implemented in a field programmable gate array (FPGA) by using the VHSIC hardware description language (VHDL). Experimental results and device utilization summary are given for the evaluation.
    Robotics and Biomimetics, 2007. ROBIO 2007. IEEE International Conference on; 01/2008
  • [Show abstract] [Hide abstract]
    ABSTRACT: The USB (universal serial bus) has become one of the most generally used peripheral interfaces due to its many advantages, including, easy connection to the PC, stability and fast data rate. Thus, it is widely used for sending and receiving large amounts of data between a peripheral device and a PC. In this paper, we implement a stand-alone color image transfer circuit using the USB 2.0 interface and verify its performance in a PC environment. For the acquisition of color image data and image processing, this circuit was designed based on an FPGA (field programmable gate array). Using this circuit, the processed image information can easily be transferred to the PC through the USB interface. This circuit can receive and process color image data from a camera by itself, without a PC. Since this circuit is based on an FPGA, we can apply the diverse image processing algorithm to it, thus making it possible to transfer processed image data at high speed through the USB interface.
    Control, Automation and Systems, 2007. ICCAS '07. International Conference on; 11/2007
  • [Show abstract] [Hide abstract]
    ABSTRACT: Due to the recent increase in the quantity of data needing to be transferred, several protocols have been introduced to support high speed data communication. Amongst these protocols, IEEE1394 is particularly suitable for transferring vast amounts of data such as video and audio. In this study, we developed an IEEE1394 image transfer circuit and a frame grabber circuit. The IEEE1394 image transfer circuit transfers data from an IEEE1394 camera to the frame grabber circuit via IEEE1394. The frame grabber circuit processes the data received from the IEEE1394 interface and displays the processed data on a monitor directly without the help of a personal computer(PC). In the frame grabber circuit, an field programmable gate array(FPGA) is used to implement a variety of image processing algorithms. Therefore, the whole system, that is the IEEE1394 interface circuit and frame grabber circuit, can operate in stand-alone mode, without the need for a PC.
    Control, Automation and Systems, 2007. ICCAS '07. International Conference on; 11/2007
  • [Show abstract] [Hide abstract]
    ABSTRACT: Connected component labeling is very useful for separating object and background, and counting objects. The sequential processing architecture proposed by Von Neumann has limits in real-time processing when large data is treated. In this study, a connected component labeling system using parallel hardware architecture is implemented. This system is able to calculate over 200 frames per second (fps) and is labeled a maximum of 255 components. This is a stand-alone system that can receive input image data from a camera and display the resulting image through a monitor.
    Control, Automation and Systems, 2007. ICCAS '07. International Conference on; 11/2007
  • [Show abstract] [Hide abstract]
    ABSTRACT: Previous processor-based Image Processing Systems have many problems such as low processing speed and cumbersome real time image processing. To solve these problems, this research suggests an Image Processing System based on the FPGA(Field-programmable Gate Array)-based Soft Core Processor and IEEE 13 94a protocol. IEEE 1394a protocol is materialized through IC(LLC, PHY) that supports IEEE1394 Ver.A(400 Mhz). The Image Processing Processor contains the Soft Core Processor and Image Processing Module and receives and controls the input image via IEEE1394a protocol. The handled image inside the FPGA is output to the LCD through VGA and DVI. When inputting the image, a camera that supports IEEE1394a protocol is used.
    Control, Automation and Systems, 2007. ICCAS '07. International Conference on; 11/2007
  • [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, we present an FPGA-based real-time voice signal preprocessing system that can compute the cross-correlation of the voice signals from number of microphones. Each cross-correlation is calculated using voice signals captured within 200 ms which has 10 ms shifting window. The sampling frequency of the proposed system is 48 KHz and the resolution of each sample is 16 bits. The entire algorithm is implemented in hardware based on FPGA and runs in real-time.
    01/2007;