Chi-Sheng Liao

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Publications (4)0 Total impact

  • Source
    Conference Proceeding: Transient-to-digital converter for protection design in CMOS integrated circuits against electrical fast transient
    Cheng-Cheng Yen, Ming-Dou Ker, Chi-Sheng Liao, Tung-Yang Chen, Chih-Chung Tsai
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    ABSTRACT: An on-chip transient-to-digital converter for protection design against electrical fast transient (EFT) is proposed. The proposed transient-to-digital converter is designed to detect fast electrical transients under EFT tests. The output digital codes can correspond to different EFT voltages during the EFT-induced transient disturbances. The experimental results in a 0.18-mum CMOS integrated circuit (IC) with 3.3-V devices have confirmed the detection function and digital output codes.
    Electromagnetic Compatibility, 2009. EMC 2009. IEEE International Symposium on; 09/2009
  • Source
    Conference Proceeding: Transient-to-digital converter for ESD protection design in microelectronic systems
    Ming-Dou Ker, Cheng-Cheng Yen, Chi-Sheng Liao, Tung-Yang Chen, Chih-Chung Tsai
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    ABSTRACT: An on-chip transient-to-digital converter for system-level electrostatic discharge (ESD) protection is proposed. The proposed transient-to-digital converter is designed to detect fast electrical transients during the system-level ESD events. The output digital thermometer codes can correspond to different ESD voltages under system-level ESD tests. The experimental results in a 0.18-mum CMOS integrated circuit (IC) with 3.3-V devices have confirmed the detection function and digital output codes.
    Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian; 12/2008
  • Source
    Conference Proceeding: Transient detection circuit for system-level ESD protection and its on-board behavior with EMI/EMC filters
    Ming-Dou Ker, Chi-Sheng Liao, Cheng-Cheng Yen
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    ABSTRACT: A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. The circuit performance of detecting fast electrical transients has been verified in a 0.18-mum CMOS integrated circuit (IC). The experimental results have confirmed that the proposed on-chip transient detection circuit can detect positive and negative fast electrical transients during system-level ESD zapping. Three board-level noise filtering networks have been investigated their enhancement on detection range of the proposed on-chip transient detection circuit. The chip-level solution can be further co-designed with the board-level solution in order to meet high system-level ESD specification.
    Electromagnetic Compatibility, 2008. EMC 2008. IEEE International Symposium on; 09/2008
  • Source
    Conference Proceeding: New transient detection circuit for system-level ESD protection
    Cheng-Cheng Yen, Chi-Sheng Liao, Ming-Dou Ker
    [show abstract] [hide abstract]
    ABSTRACT: A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. By including this new proposed on-chip transient detection circuit, a hardware/firmware solution cooperated with power-on reset circuit can be co-designed to fix the system-level ESD issues. The circuit performance to detect different positive and negative ESD-induced fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.18-mum CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system- level ESD zapping.
    VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on; 05/2008
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