J. Razafmdramora,
L. Perniola,
C. Jahan,
P. Scheiblin,
M. Gely,
C. Vizioz, C. Carabasse,
F. Boulanger,
B. De Salvo,
S. Deleonibus,
S. Lombardo,
C. Bongiorno
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ABSTRACT: In this paper, we present a deep investigation of ultra-scaled Finflash memories, fabricated on Silicon on Insulator (SOI) substrate, with Silicon NanoCrystal (Si-NC) or nitride layers acting as storage nodes. Electrical characteristics of devices with channel length (L<sub>G</sub>) as short as 30 nm, and fin width (W<sub>FIN</sub>) as narrow as 10 nm are shown. Effective Channel Hot Electron (CHE) writing with sub-3.2 V drain biases (i.e. DeltaV<sub>TH</sub>=3V at V<sub>G</sub>/V<sub>D</sub>/t<sub>stress</sub>=9V/2.5V/100 mus), as well as Hot Hole Injection (HHI) erasing with sub-4.5V drain biases are demonstrated. Finally, fully three dimensional Monte Carlo simulations, coupled with an original semi-analytical approach, allow us to give a qualitative explanation of the obtained experimental data.
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European; 10/2007
