J.A. Chandy

University of Connecticut, Storrs, CT, USA

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Publications (7)0 Total impact

  • Conference Proceeding: Extendable storage framework for reliable clustered storage systems
    S. Narayan, J.A. Chandy
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    ABSTRACT: The total amount of information stored on disks has increased tremendously in recent years with data storage, sharing and backup becoming more important than ever. The demand for storage has not only changed in size, but also in speed, reliability and security. These requirements create a big challenge for storage system architects who aim for a one system fits all design. Storage policies like backup and security are typically set for an entire file system. However, this granularity is too large and can sacrifice storage efficiency and performance, particularly since different files have different storage requirements. In this work, we provide a framework for an attribute-based extendable storage system which will allow storage policy decisions to be made at file-level granularity and at all levels of the storage stack, including file system, operating system, and device managers. We propose to do this by using a file's extended attributes that will enable different tasks via plugins or functions implemented at various levels within the storage stack and provide a complete data-aware storage functionality from an application point of view. We provide examples of how our framework can be used to improve performance in a reliable clustered storage system.
    Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010 IEEE International Symposium on; 05/2010
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    Conference Proceeding: Multiple Valued Logic Using 3-State Quantum Dot Gate FETs
    J.A. Chandy, F.C. Jain
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    ABSTRACT: This paper presents fundamental logic structures designed using novel quantum dot gate FETs with three-state characteristics. This three-state FET manifests itself as a transistor with a stable "intermediate" state, where the drain current remains constant over a range of input gate voltages due to a change in the threshold voltage over this range. We have developed a simplified circuit model that accounts for this intermediate state. Using this model, we have designed rudimentary logic circuits for use in multiple-valued logic circuits.
    Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on; 06/2008
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    Conference Proceeding: Parity Redundancy in a Clustered Storage System
    S. Narayan, J.A. Chandy
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    ABSTRACT: Distributed storage systems must provide highly available access to data while maintaining high performance and maximum scalability. In addition, reliability in a storage system is of the utmost importance and the correctness and availability of data must be guaranteed. Adding parity redundancy to distributed storage systems has been problematic because of the impact on performance. In this paper, we investigate mechanisms to add redundancy to the Lustre cluster file system with minimal effect on overall system performance. With data spread across multiple nodes, ensuring the consistency of the data requires special techniques. We describe fault tolerant algorithms to maintain the consistency and reliability of the data. We show how these techniques guarantee data integrity and availability of systems for read and write even under failure mode scenarios.
    Storage Network Architecture and Parallel I/Os, 2007. SNAPI.International Workshop on; 10/2007
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    Conference Proceeding: Storage Allocation in Unreliable Peer-to-Peer Systems
    J.A. Chandy
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    ABSTRACT: Peer-to-peer systems provide the opportunity to pool large amounts of distributed resources to enable Internet-scale applications. However, the participant nodes are highly dynamic and unreliable. Thus, any shared resource such as file objects must incorporate redundancy to be useful. While many studies have proposed heuristics to determine redundancy levels based on object popularity, there has been little work in determining optimal or near-optimal resource allocation based on node reliability. In this paper, we present a strategy for the allocation of objects in the presence of dynamic and unreliable peers. We have built an availability model of peer-to-peer storage systems based on the bimodal and time-dependent availability characteristics of a P2P node. Using this model, we can select the size of a candidate node set for storage allocation and assign storage objects to maximize availability while still maintaining a balanced distribution of objects
    Dependable Systems and Networks, 2006. DSN 2006. International Conference on; 02/2006
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    Conference Proceeding: A signature match processor architecture for network intrusion detection
    Janardhan Singaraju, L. Bu, J.A. Chandy
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    ABSTRACT: In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructure as they serve as a key line of defense in network protection. However, current methods are much too compute intensive and cannot begin to meet the bandwidth requirements of a moderate sized corporate network. Thus, hardware techniques are desired to speed up network processing. This paper introduces a FPGA based signature match processor that can serve as the core of a hardware based NIDS. The signature match processor's key feature is a CAM-based cellular processor architecture that can match strings in an area efficient manner. Using a unique binary tree structure, we are also able to generate priority encoded addresses corresponding to multiple signature matches.
    Field-Programmable Custom Computing Machines, 2005. FCCM 2005. 13th Annual IEEE Symposium on; 05/2005
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    Conference Proceeding: FPGA based network intrusion detection using content addressable memories
    Long Bu, J.A. Chandy
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    ABSTRACT: In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). Current software-based NIDS are too compute intensive and cannot meet the bandwidth requirements of a modern network. Thus, hardware techniques are desired to speed up network processing. This paper introduces a FPGA based keyword match processor that can serve as the core of a hardware based NIDS. The keyword match processor's key feature is a cellular processor architecture that allows content addressable memory (CAM) to process variable sized keys. These CAMs allow us to perform intrusion detection signature lookup at line speed at rates well past 2 Gbps.
    Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on; 05/2004
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    Conference Proceeding: A scalable architecture for clustered network attached storage
    J.D. Bright, J.A. Chandy
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    ABSTRACT: Network attached storage systems must provide highly available access to data while maintaining high performance, easy management, and maximum scalability. In this paper, we describe a clustered storage system that was designed with these goals in mind. The system provides a unified file system image across multiple nodes, which allows for simplified management of the system. Availability is preserved with multiple nodes and parity-striped data across these nodes. This architecture provides two key contributions: the ability to use low-cost components to deliver scalable performance and the flexibility to specify redundancy and performance policy management on a file-by-file basis. The file system is also tightly integrated with standard distributed file system protocols thereby allowing it to be used in existing networks without modifying clients.
    Mass Storage Systems and Technologies, 2003. (MSST 2003). Proceedings. 20th IEEE/11th NASA Goddard Conference on; 05/2003

Institutions

  • 2004–2010
    • University of Connecticut
      • Department of Electrical and Computer Engineering
      Storrs, CT, USA