F. Aflatouni

University of Southern California, Los Angeles, CA, USA

Are you F. Aflatouni?

Claim your profile

Publications (4)4.04 Total impact

  • Article: Design Methodology and Architectures to Reduce the Semiconductor Laser Phase Noise Using Electrical Feedforward Schemes
    F. Aflatouni, M. Bagheri, H. Hashemi
    [show abstract] [hide abstract]
    ABSTRACT: Analysis of feedforward linewidth reduction scheme for semiconductor lasers followed by measurements are presented in this paper. The design challenges for such a system, followed by improvements to the original scheme are explained and demonstrated using top-bench electrooptical setups. The experiments are carried out on a commercially available 1.55- m distributed feedback (DFB) laser. The measurement results show more than 40 times reduction in frequency noise power spectrum. Also the laser original full-width at half-maximum (FWHM) linewidth of 2.6 MHz is reduced to less than 140 KHz. The feedforward scheme does not have the limited noise cancellation bandwidth, instability, and speed issues that are common in feedback linewidth reduction systems. In this scheme, the ultimate achievable phase noise will be limited by the noise of electronic circuitry and laser intensity noise. Using the proposed feedforward approach, the frequency noise of semiconductor lasers can be reduced by 3-4 orders of magnitude in a monolithic approach using today's low-noise scaled transistors with THz gain-bandwidth product.
    IEEE Transactions on Microwave Theory and Techniques 12/2010; · 1.85 Impact Factor
  • Conference Proceeding: A 1.8mW Wideband 57dBΩ transimpedance amplifier in 0.13µm CMOS
    F. Aflatouni, H. Hashemi
    [show abstract] [hide abstract]
    ABSTRACT: In multi-hundred Gb/s parallel optical links for on-chip or chip-to-chip data transfer, system components should be very low power while occupying small chip areas. This paper presents a low power transimpedance amplifier (TIA) that is based on regulated cascode with vertically stacked inductors, and can operate up to 10 Gb/s in presence of 370 fF input capacitance. The 0.13 mum CMOS TIA consumes 1.8 mW to provide 57 dBOmega transimpedance gain, while occupying 150 mumtimes100 mum active area. The measured input referred current noise of the differential TIA is less than 30 pA/radicHz across 8 GHz.
    Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE; 07/2009
  • Source
    Article: Phase-Controlled Apertures Using Heterodyne Optical Phase-Locked Loops
    [show abstract] [hide abstract]
    ABSTRACT: In this letter, we demonstrate the use of an electronic feedback scheme using a voltage controlled oscillator (VCO) to control the optical phase of individual semiconductor lasers (SCLs) phase locked to a common reference laser using heterodyne optical phase-locked loops (OPLLs). The outputs of two external cavity SCLs phase-locked to a common reference laser are coherently combined, and the variation in the relative optical path lengths of the combining beams is corrected by dynamically changing the phase of the offset radio-frequency signal fed into one of the OPLLs by means of a VCO. A stable power combination efficiency of 94% is achieved. This inherently different method of phase control, i.e., electronic rather than the use of electrooptic crystals, is deemed essential for new applications involving coherent optoelectronics.
    IEEE Photonics Technology Letters 07/2008; · 2.19 Impact Factor
  • Source
    Conference Proceeding: A heterodyne phase locked loop with GHz acquisition range for coherent locking of semiconductor lasers in 0.13 μm CMOS
    F. Aflatouni, O. Momeni, H. Hashemi
    [show abstract] [hide abstract]
    ABSTRACT: A heterodyne electro-optical phase locked loop (EO-PLL) architecture is proposed that can lock the frequency and phase of semiconductor lasers. An aided acquisition circuit inspired by the combination of RF image rejection receivers and digital PLL architectures is incorporated in the EOPLL to extend the frequency acquisition range to GHz, even in the presence of large optical delays in the EOPLL. An integrated circuit prototype is implemented in a 0.13 μm CMOS technology and includes a wide bandwidth transimpedance amplifier and the PLL circuitry. Measurement results for the stand-alone chip and the locking of vertical cavity surface emitting lasers (VCSEL) using the implemented chip are reported.
    Custom Integrated Circuits Conference, 2007. CICC '07. IEEE; 10/2007

Institutions

  • 2007–2010
    • University of Southern California
      • Department of Electrical Engineering
      Los Angeles, CA, USA
  • 2008
    • California Institute of Technology
      • Department of Electrical Engineering
      Pasadena, CA, USA