Walter M Weber

NaMLab GmbH, Dresden, Saxony, Germany

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Publications (38)94.81 Total impact

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    ABSTRACT: In this work, we investigate the temperature dependence of electrical switching properties of back-gated, undoped Si-nanowire field-effect transistors with Ni-silicided source/drain contacts. A simple, phenomenological model illustrates the leading order temperature dependence of the source-drain current, which originates predominantly from charge carrier injection by tunneling through the Schottky junction. Drain current versus gate voltage measurements have been performed for various temperatures and several drain voltages on a single nanowire device. The temperature dependence of the drain-source current for specific gate and drain voltages is analysed within the framework of voltage dependent effective barrier heights. As a result, the temperature dependence of the tunnelling current is not only important for the sub-threshold region, but also plays a significant role in the transistor “on-state”. In addition, the effective barrier heights for electrons and holes tend towards the natural Schottky barriers of the NiSi2-Si interface, if the applied external fields generate the case of flat band condition at the injection Schottky barrier, i.e. in the deep “off-state” region. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)
    physica status solidi (c) 08/2014;
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    ABSTRACT: A feasibility and performance study of electrically reconfigurable nanowire transistors with selectable pFET and nFET operations is presented. The challenges toward circuit implementation are evaluated based on transient simulations of logic circuits. A novel physical structure capable of computing a NAND as well as NOR function is introduced. The new approach provides a flexible platform to develop and test fine-grain reconfigurable circuits and systems.
    IEEE Electron Device Letters 01/2014; 35(1):141-143. · 2.79 Impact Factor
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    ABSTRACT: Silicon nanowires offer unique properties like inherent small diameters, quasi 1-dimensional current transport and the flexibility to combine materials that cannot be combined in bulk or thin film structures. Based on these properties electron devices, sensors as well as solar cells and lithium batteries can be envisioned that significantly outperform their thin film or bulk counterparts. The expectation, that the ultimate MIS device will be based on silicon nanowires gives this technology the potential for a seamless integration into integrated electronic systems. This paper gives an overview of important device applications of silicon nanowires. Starting with nanowire fabrication, the different device concepts and their important features will be introduced.
    physica status solidi (RRL) - Rapid Research Letters 10/2013; 7(10):793-799. · 2.39 Impact Factor
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    ABSTRACT: We present novel multifunctional nano-circuits built from nanowire transistors that uniquely feature equal electron and hole conduction. Thereby, the mandatory requirement to yield energy efficient circuits with a single type of transistor is shown for the first time. Contrary to any transistor reported up to date, regardless of the technology and semiconductor materials employed, the dually active silicon nanowire channels shown here exhibit an ideal symmetry of current-voltage device characteristics for electron (n-type) and hole (p-type) conduction as evaluated in terms of comparable currents, turn-on threshold voltages and switching slopes. The key enabler to symmetry is the selective tunability of the tunneling transmission of charge carriers as rendered by the combination of the nanometer-scale dimensions of the junctions and the application of radially compressive strain. To proof the advantage of this concept we integrated dually active transistors into cascadable and multi-functional one-dimensional circuit strings. The nano-circuits confirm energy efficient switching and can further be electrically configured to provide four different types of operation modes compared to a single one when employing conventional electronics with the same amount of transistors.
    Nano Letters 08/2013; · 13.03 Impact Factor
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    ABSTRACT: Over the past years, high-k dielectrics have been incorporated into modern semiconductor devices. One example is ZrO2, which has been introduced in memory applications. This paper elucidates some difficulties with pure ZrO2 like unintended crystallization during the growth of the dielectric and the evolution of the monoclinic phase, which reduces the k-value. The admixture of Sr is shown as a solution to circumvent those issues. A detailed structural analysis for a varying stoichiometry ranging from pure ZrO2 to the perovskite SrZrO3 is given. The detected crystal structures are correlated to our observations of the dielectric properties obtained by an electrical characterization. (C) 2013 AIP Publishing LLC.
    Journal of Applied Physics 01/2013; 113(22). · 2.21 Impact Factor
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    ABSTRACT: Metal-Insulator-Metal capacitors, with ZrO2/Al2O3/ZrO2 (ZAZ)-nanolaminate thin-films as a dielectric layer, exhibit reduced leakage currents compared to corresponding capacitors based on pure ZrO2 while maintaining a sufficiently high dielectric constant for the DRAM application. This work is a comparative study demonstrating how the incorporation of a small amount of Al is responsible for the suppression of crystallization during deposition. Extensive electrical characterization leads to the identification of a defect band which conductive atomic force microscopy shows to be formed along crystallite grain boundaries, extending through the entire ZrO2-film. The incorporation of a sub-layer of Al2O3 prevents these grain boundaries resulting in an effective reduction of leakage currents, despite the film being in the nanocrystalline phase, necessary for it to exhibit the required high dielectric constant. A transport model based on phonon assisted trap to trap tunneling is proposed. (C) 2013 AIP Publishing LLC.
    Journal of Applied Physics 01/2013; 113(19). · 2.21 Impact Factor
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    ABSTRACT: We present novel Schottky barrier field effect transistors consisting of a parallel array of bottom-up grown silicon nanowires that are able to deliver high current outputs. Axial silicidation of the nanowires is used to create defined Schottky junctions leading to on/off current ratios of up to 10(6). The device concept leverages the unique transport properties of nanoscale junctions to boost device performance for macroscopic applications. Using parallel arrays, on-currents of over 500 mu A at a source-drain voltage of 0.5 V can be achieved. The transconductance is thus increased significantly while maintaining the transfer characteristics of single nanowire devices. By incorporating several hundred nanowires into the parallel array, the yield of functioning transistors is dramatically increased and deviceto-device variability is reduced compared to single devices. This new nanowirebased platform provides sufficient current output to be employed as a transducer for biosensors or a driving stage for organic light-emitting diodes (LEDs), while the bottom-up nature of the fabrication procedure means it can provide building blocks for novel printable electronic devices.
    Nano Research 01/2013; 6(6):381-388. · 7.39 Impact Factor
  • Solid-State Device Research Conference (ESSDERC), 2013 Proceedings of the European; 01/2013
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    ABSTRACT: Surface functionalization of NiSi2-Si-NiSi2 nanowire heterostructures, acting as Schottky-junction field effect transistors (SB-FETs) represent a promising route for biosensor applications. Axially Ni- silicidized silicon nanowires exhibit a very sharp metal-semiconductor interface, thus forming a well defined and reproducible Schottky barrier. These barriers determine the current through the wire and can be changed by small molecules chemiadsorbed on the nanowire surface. We report that surface modifications can alter the polarity of the devices. This severe influence on the charge transport implies ultrahigh sensitivity for nanowire SB-FETs.
    Proceedings of IMCS 2012 – The 14th International Meeting on Chemical Sensors, Nuremburg; 05/2012
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    ABSTRACT: Over the past 30 years electronic applications have been dominated by complementary metal oxide semiconductor (CMOS) devices. These combine p- and n-type field effect transistors (FETs) to reduce static power consumption. However, CMOS transistors are limited to static electrical functions, i.e., electrical characteristics that cannot be changed. Here we present the concept and a demonstrator of a universal transistor that can be reversely configured as p-FET or n-FET simply by the application of an electric signal. This concept is enabled by employing an axial nanowire heterostructure (metal/intrinsic-silicon/metal) with independent gating of the Schottky junctions. In contrast to conventional FETs, charge carrier polarity and concentration are determined by selective and sensitive control of charge carrier injections at each Schottky junction, explicitly avoiding the use of dopants as shown by measurements and calculations. Besides the additional functionality, the fabricated nanoscale devices exhibit enhanced electrical characteristics, e.g., record on/off ratio of up to 1 × 10(9) for Schottky transistors. This novel nanotransistor technology makes way for a simple and compact hardware platform that can be flexibly reconfigured during operation to perform different logic computations yielding unprecedented circuit design flexibility.
    Nano Letters 11/2011; 12(1):119-24. · 13.03 Impact Factor
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    ABSTRACT: This work elucidates the role of the Schottky junction in the electronic transport of nanometer-scale transistors. In the example of Schottky barrier silicon nanowire field effect transistors, an electrical scanning probe technique is applied to examine the charge transport effects of a nanometer-scale local top gate during operation. The results prove experimentally that Schottky barriers control the charge carrier transport in these devices. In addition, a proof of concept for a reprogrammable nonvolatile memory device based on band bending at the Schottky barriers will be shown.
    Physical Review Letters 11/2011; 107(21):216807. · 7.73 Impact Factor
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    ABSTRACT: CaTiO3 layers with varying thicknesses in metal-insulator-metal capacitor stacks were deposited at 550 °C using radio-frequency magnetron sputtering. The combination of electrical and transmission electron microscopy measurements allows a correlation of k-value and leakage current to the degree of crystallinity. Experiments show that higher crystallinity and, therefore, higher k-values lead to increasing leakage currents and change of conduction mechanisms. However, leakage currents are significantly reduced when crystallites are embedded in an amorphous matrix. Selective growth of these crystallites is owed to cube-on-cube nucleation of CaTiO3 on 011 Pt.
    Applied Physics Letters. 11/2011; 99(22):222905-222905-3.
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    ABSTRACT: We present a theoretical framework for the calculation of charge transport through nanowire-based Schottky-barrier field-effect transistors that is conceptually simple but still captures the relevant physical mechanisms of the transport process. Our approach combines two approaches on different length scales: (1) the finite element method is used to model realistic device geometries and to calculate the electrostatic potential across the Schottky barrier by solving the Poisson equation, and (2) the Landauer-Büttiker approach combined with the method of non-equilibrium Green's functions is employed to calculate the charge transport through the device. Our model correctly reproduces typical I-V characteristics of field-effect transistors, and the dependence of the saturated drain current on the gate field and the device geometry are in good agreement with experiments. Our approach is suitable for one-dimensional Schottky-barrier field-effect transistors of arbitrary device geometry and it is intended to be a simulation platform for the development of nanowire-based sensors.
    Nanotechnology 08/2011; 22(32):325703. · 3.84 Impact Factor
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    ABSTRACT: In this paper we present the investigation of high-k dielectrics in a metal–insulator–metal structure. We show the physical and electrical properties of ZrO2 and SrxZr(1−x)Oy grown through sputter deposition. Uncontrolled crystallization of ZrO2 during the growth into a mixture of different phases was observed. As a consequence, the k-value was suppressed. Stabilization of the amorphous phase of the as grown films could be achieved by the admixture of SrO. This enabled controlled crystallization into a single phase after performing post-deposition annealing. The k-value of the annealed SrxZr(1−x)Oy was determined to be 33.
    Microelectronic Engineering 07/2011; 88:1326-1329. · 1.22 Impact Factor
  • Walter M Weber, Andre Heinzig, Thomas Mikolajick
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    ABSTRACT: Silicon nanowires are currently being considered as possible candidates for Beyond-CMOS electronic applications. One attractive nanowire transistor concept is the Schottky junction FET where the source and drain regions are metallic. The most appropriate device geometry to couple the gate potential to the junctions is an axial metal / semiconductor / metal nanowire heterostructure. Here, NiSi2 / Si / NiSi2 nanowire heterostructures are fabricated and used as the core of our transistors. Characteristic advantages of these structures are the abrupt and homogeneous Schottky interfaces formed. In contrast to most Schottky FETs the clear definition of the junction area, as given by the nanowire cross-section has the prospect of reducing device to device variability.
    ECS Transactions; 05/2011
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    ABSTRACT: HfTiO2 layers of various stoichiometries where deposited by physical vapor depostion on TiN and TiN/Ru bottom electrodes (BE) in order to determine the influence of composition, conduction band offset, and BE morphology on the overall leakage current characteristics. Current-voltage spectroscopy, transmission electron microscopy, electron energy loss spectroscopy, and conductive atomic force microscopy studies show increased leakage current and charge trapping with increased Ti content. The interplay of conduction band offset and trap density were studied. The influence of Ru bottom electrode roughness on the leakage current is higher than the influence of Ti content and low conduction band offset.
    Applied Physics Letters 01/2011; 98(1):012901-012901-3. · 3.79 Impact Factor
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    ABSTRACT: Reconfigurable nanowire transistors merge the electrical properties of unipolar n- and p-type FETs into a single type of device with identic technology, geometry and composition. These four-terminal nanowire transistors employ an electric signal to dynamically program unipolar n- or p-type behavior. More than reducing the technological complexity, they open up the possibility of dynamically programming the functions of circuits at the device level, i.e. enabling a fine-grain reconfiguration of complex functions. We will review different reconfigurable concepts, analyze the transport properties and finally assess their maturity for building circuits.
    Solid-State Electronics 01/2011; · 1.48 Impact Factor
  • Verhandlungen der Deutschen Physikalischen Gesellschaft. 01/2011;

Publication Stats

172 Citations
94.81 Total Impact Points


  • 2011–2013
    • NaMLab GmbH
      Dresden, Saxony, Germany
  • 2006–2008
    • University of Technology Munich
      • Institute of Nanoelectronics
      München, Bavaria, Germany