Young Hwan KIM

Publications (5)1.88 Total impact

• Article: Codeword mapping optimization method for minimization of recognized false contour noise

  Bong-Seok Kang, Young-Hwan Kim
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  ABSTRACT: A new codeword mapping optimization method is proposed to reduce the recognized amount of false contour noise (FCN). The proposed method is based on the fact that the FCN generated at the object surface is perceived more significantly than the FCN generated at the object edge and minimizes object surface FCN first by mapping similar codeword intensively to gray levels consisting of that surface. For implementation, a new FCN evaluation method which considers the FCNs generated in all possible gray level pairs is introduced and the cost function and the search space of the new codeword mapping optimization method are derived from the FCN evaluation method. Finally, a method which calculates the recognized amount of FCN from the generated amount of FCN is introduced.
  IEEE Transactions on Consumer Electronics 09/2009; · 0.94 Impact Factor
• Source

  Available from: jbnu.ac.kr

  Article: Symmetric Discharge Logic against Differential Power Analysis.

  Jong Suk Lee, Jae Woon Lee, Young Hwan Kim
  IEICE Transactions. 01/2007; 90-A:234-240.
• Article: An application specific processor-based controller for plasma display panels

  Jong Suk Lee, Bong Hyun Lee, Bong Seok Kang, Young Hwan Kim
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  ABSTRACT: To display motion pictures, the driving circuit of an AC plasma display panel (PDP) applies alternating high voltages to selected panel electrodes for only a few microseconds at a time. To direct these high-voltage sequences, the PDP controller produces timed control signals. It also performs PDF-specific video processing work. Recent research on improving the performance of PDPs has resulted in the development of many sophisticated driving methods. The elaborate control schemes for these new driving methods require more flexibility and more scalability than traditional hard-wired controllers can provide. This paper presents a 32-bit processor-based PDP controller, which consists of an application specific processor and several peripheral modules necessary for PDP control. Using software programming, the proposed PDP controller provides the flexibility to implement varied control schemes without hardware redesign. We proved our design by constructing a PDP system, using the proposed PDP controller. The FPGA implementation of the controller runs at 50 MHz, and the system successfully displays motion pictures on a 42-inch panel with XGA resolution
  IEEE Transactions on Consumer Electronics 09/2006; · 0.94 Impact Factor
• Source

  Available from: jbnu.ac.kr

  Article: Clock-Free MTCMOS Flip-Flops with High Speed and Low Power

  Bong Hyun LEE, Young Hwan KIM, Kwang-Ok JEONG
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  ABSTRACT: This paper proposes two high-performance multi-threshold-voltage CMOS (MTCMOS) F/Fs that are based on the CMOS hybrid-latch F/F and the CMOS semi-dynamic F/F. The proposed F/Fs utilize a clock-gating technique or a data recovery circuit in order to preserve their logic states in the power-down mode. They can change operation modes whether the clock level is high or low, and they provide outputs to fanouts in the power-down mode. When compared with existing clock-free MTCMOS F/Fs, the proposed MTCMOS hybrid-latch F/F shows maximum reduction of average delay, average power, and average power-delay product by 33%, 46%, and 63% for the supply voltage ranging from 0.8 V to 1.2 V. Although outperformed by the MTCMOS hybrid-latch F/F, the proposed MTCMOS semi-dynamic F/F inherits the benefit of the embedded logic from the CMOS SD F/F. Experimental results indicate that the MTCMOS semi-dynamic F/F can be used to implement a logic circuit that is superior to the one designed using the MTCMOS hybrid-latch F/F in speed, power, and area.
• Source

  Available from: jbnu.ac.kr

  Article: Image-Dependent Code Optimization to Improve Motion Picture Quality of Plasma Displays

  Jong Suk LEE, Bong Seok KANG, Young Hwan KIM
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  ABSTRACT: This letter proposes an efficient method to find the optimum subfield code, which minimizes the visual artifacts on the motion pictures of the plasma display panel (PDP). Existing codes were constructed to reduce dynamic false contour (DFC) only, and they are fixed codes used for every image. In contrast, the proposed method aims to minimize the total artifacts by DFC and halftone noise (HN), and it finds the best code for a given image, dynamically. First, this letter presents the novel models to estimate the effect of DFC and HN for given codewords and a given image. Then, it presents an efficient method that finds the optimum code for a given image using the well-known shortest-path algorithm. Experimental results, using 459 HDTV images, illustrated that the proposed approach improved the average PSNR by 0.713 dB and 7.004 dB in DFC and HN, respectively, when compared with Gravity Centre Code [1].