S. Glisic

Institute for High Performance Microelectronics, Frankfort on the Oder, Brandenburg, Germany

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Publications (36)13.25 Total impact

  • [Show abstract] [Hide abstract]
    ABSTRACT: A 246 GHz source in InP-on-BiCMOS technology is presented. It consists of a voltage controlled oscillator (VCO) in BiCMOS technology and a frequency tripler in transferred-substrate InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level bonding process. The VCO operates at 82 GHz with 6 dBm output power and the combined circuit delivers $-10~{rm dBm}$ at 246 GHz, with a phase noise of $-87~{rm dBc}/{rm Hz}$ at 2 MHz offset. To the knowledge of the authors, this is the first hetero-integrated signal source in this frequency range reported so far. The results illustrate the potential of the hetero integrated process for sub-mm-wave frequencies.
    IEEE Microwave and Wireless Components Letters 01/2014; 24(7):469-471. · 1.78 Impact Factor
  • Source
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    ABSTRACT: Polarimetric radio wave processing becomes of increasing interest for very high-data rate wireless transmission and for short-range radar at millimeter-waves (mm-W). This goes along with the huge bandwidth of 7 to 9 GHz, which is available worldwide in the 60 GHz unlicensed band. In this paper, we propose a 60 GHz ultra-wideband (UWB) polarimetric multiple-input-multiple-output (MIMO) sensing system architecture and polarimetric signal processing for short-range communications and radar. Demonstration measurements were made by using an UWB radar interface. By measurements in multipath rich environments it is demonstrated that tap-wise polarimetric filtering in delay domain can enhance the 60 GHz link budget by filtering some paths and then reducing shadowing due to human activity. Additionally, optimum MIMO polarimetric filtering is proposed to reduce heavy clutter for mm-W radar, increasing by about 30 dB the signal-to-clutter-plus-noise-ratio.
    IEEE Transactions on Antennas and Propagation 04/2013; 61(4):1631-1641. · 2.33 Impact Factor
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    ABSTRACT: This paper describes the design of 220-250-GHz phased-array circuits in 0.13- μm BiCMOS technology. The design aspects of the active and passive devices that are used in the phased-array systems, such as balun, Wilkinson divider, and branch-line coupler, are presented in details. A millimeter-wave vector modulator is designed to support both amplitude and phase control for beam-forming applications. The designed circuits are integrated together to form a four-channel 220-250-GHz phased-array chip. Each channel exhibits 360° phase control with 18 dB of amplitude control. The entire chip draws 167 mA from a 3.3-V supply. The millimeter-wave phase shifting and the low-power consumption makes it ideal for highly integrated scalable beam-forming systems for both imaging, radiometry, and communication applications.
    IEEE Transactions on Microwave Theory and Techniques 01/2013; 61(8):3115-3127. · 2.23 Impact Factor
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    ABSTRACT: A 164 GHz source in a hetero-integrated semiconductor technology is presented. It features a fundamental frequency voltage-controlled oscillator in BiCMOS, which is used to drive a doubler-amplifer chain in transferred-substrate InP-HBT technology, integrated on top of the BiCMOS wafer in a wafer-level Benzocyclobutene based bonding process. The VCO operates at 82 GHz with an output power of approximately 8 dBm. The combined circuit delivers 0 dBm at 164 GHz. Measured output power agrees well with simulations. The results demonstrate the feasibility of hetero-integrated circuits operating well above 100 GHz.
    Microwave Integrated Circuits Conference (EuMIC), 2013 European; 01/2013
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    ABSTRACT: A 240 GHz direct conversion IQ receiver manufactured in 0.13 SiGe BiCMOS technology with fT/fmax of 300/500 GHz is presented. The receiver consists of a four stage LNA, an active power divider, an LO IQ generation network, and direct down-conversion fundamental mixers. The integrated IQ receiver yields a conversion gain of 18 dB, an 18 dB simulated DSB NF, and a 3 dB bandwidth of 25 GHz. The required 245 GHz LO power is in the order of -10 dBm. The receiver exhibits an IQ amplitude and phase imbalance of 1 dB and 3° respectively. It draws 135 mA from the 3.5 V supply and 20 mA from 2 V.
    Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE; 01/2013
  • S. Glisic, M. Elkhouly, C. Meliani
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    ABSTRACT: A fully integrated differential power amplifier, produced in 130 nm SiGe process for 60 GHz application is presented. The PA features one-stage cascade topology with measured gain of 17.5 dB. The measured differential 1dB compression point (P1dB) at the output is 12.7 dBm, and the measured saturated power is 13.3 dBm. Power consumption at P1dB is 57.1 mW. The measured peak power-aided efficiency is 32.9%. To the best knowledge of authors, this is a record value for 60 GHz PAs in SiGe and CMOS.
    Microwave Integrated Circuits Conference (EuMIC), 2013 European; 01/2013
  • European Microwave Week (EuMW 2013); 01/2013
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    ABSTRACT: This paper describes the specific development of a high-data-rate 57-64-GHz point-to-multipoint wireless local-area network communication system and the worldwide first installation of such a system into an aircraft cabin mock-up. All of the system components, from the RF-chip-set, the low-temperature cofired ceramic integrated antennas, and RF modules to the baseband processor, the medium access control, and the application software were purpose-designed for a wireless backbone for in-cabin communication. The integration aspects of these system components into a passenger aircraft cabin mock-up (ceiling and passenger seat-integration) as well as successful system performance tests were carried out and are reported here.
    IEEE Transactions on Microwave Theory and Techniques 12/2012; 60(12):4209-4219. · 2.23 Impact Factor
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    ABSTRACT: This paper describes the design of D-band phased-array circuits in 0.25 −m technology. The first part describes the design of the passive components which are used in the phased-array systems such as balun, Wilkinson divider and branch-line coupler. A millimeter-wave vector-modulator is designed to support both amplitude and phase control for beam-forming applications. In the second part the designed circuits are integrated together to form a two channel 110–130 GHz phased-array chip. Each channel exhibits 360° phase control with 15 dB of amplitude control range and gain of −10 dB. The entire chip draws 45 mA from 3.3 V supply. The millimeter-wave phase shifting and the low-power consumption makes it ideal for highly integrated scalable beam-forming systems for both imaging and communication.
    Proc. 7th German Microwave Conf. (GeMiC); 01/2012
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    ABSTRACT: This paper reports for the first time on a novel 57–64GHz point-to-multipoint WLAN system, which is installed into an aircraft cabin mock-up. All the system components, from the RF-chip-set, the LTCC-integrated antennas and modules, to the baseband and application software were specifically developed for this application. In addition, the integration of these system components into a passenger aircraft cabin mock-up (ceiling and seat-integration) as well as successful system performance tests were carried out.
    Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International; 01/2012
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    ABSTRACT: A fully integrated transmitter (TX) and receiver (RX) front-end chipset, produced in 0.25 µm SiGe:C bipolar and complementary metal oxide semiconductor (BiCMOS) technology, is presented. The front-end is intended for high-speed wireless communication in the unlicensed ISM band of 9 GHz around 60 GHz. The TXand RX features a modified heterodyne topology with a sliding intermediate frequency. The TX features a 12 GHz in-phase and quadrature (I/Q) mixer, an intermediate frequency (IF) amplifier, a phase-locked loop, a 60 GHz mixer, an image-rejection filter, and a power amplifier. The RX features a low-noise amplifier (LNA), a 60 GHz mixer, a phase-locked loop (PLL), and an IF demodulator. The measured 1-dB compression point at the TX output is 12.6 dBm and the saturated power is 16.2 dBm. The LNA has measured noise figure of 6.5 dB at 60 GHz. Error-free data transmission with a 16 quadrature amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal and data rate of 3.6 Gbit/s (without coding 4.8 Gbit/s) over 15 m was demonstrated. This is the best reported result regarding both the data rate and transmission distance in SiGe and CMOS without beamforming.
    International Journal of Microwave and Wireless Technologies 03/2011; 3(02):139 - 145. · 0.57 Impact Factor
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    ABSTRACT: A fully integrated transmitter (TX) front-end for wireless communication at 60 GHz, produced in 0.25 μm SiGe:C BiCMOS technology is presented. The transmitter features a modified heterodyne topology with a sliding intermediate frequency (IF). The TX features IF I/Q mixers, an IF amplifier, a 60 GHz mixer, a phase-locked loop, an image-rejection filter and a power amplifier. The measured 1-dB compression point at the output is 12.6 dBm and the saturated power is 16.2 dBm. Error-free data transmission with a 16QAM OFDM signal and data rate of 3.6 Gbit/s (without coding 4.8 Gbit/s) over 15 m was demonstrated. This is the best reported result regarding both the data rate and transmission distance in SiGe without beamforming.
    Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on; 02/2011
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    ABSTRACT: In this work, a 122 GHz transmitter circuit using frequency doublers is realized in 0.13 μm SiGe:C BiCMOS technology with f<sub>T</sub>/f<sub>max</sub> of 250/315 GHz. Two versions of the frequency doubler based on the balanced topology with cascode transistor are implemented. In the basic version, the peak conversion gain was -9 dB with -6 dBm output power. In the improved version the peak conversion gain is improved to -6 dB with -3 dBm peak output power by using open stubs as second harmonic reflectors. A transmitter is realized by combining a VCO working from 59-62 GHz with the basic version of the doubler. The transmitter output power is from -3.5 to -5.5 dBm in the output frequency range of 118-122 GHz.
    Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on; 02/2011
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    ABSTRACT: A four channel 60 GHz beamforming transmitter based on an RF phase shifting architecture is developed fabricated in a SiGe BiCMOS process. The transmitter includes an integrated 48 GHz frequency synthesizer, an up-conversion mixer, and a fully differential millimeter-wave power division and distribution network. Each channel consists of a 2 bit digitally controlled phase shifter and a high power amplifier. The transmitter has approximately 17 dB conversion gain per channel. The maximum saturated RF output power is 15.8 dBm. Each channel dissipates 600 mW.
    Proc. European Microwave Integrated Circuits Conf. (EuMIC); 01/2011
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    ABSTRACT: This paper presents an integrated 60 GHz sliding-IF receiver fabricated in a 0.25 �m SiGe BiCMOS technology. The receiver chain consists of a front-end and an IF IQ demodulator centered at around 12 GHz. A 48 GHz PLL is used to generate the front-end LO signal and the IF quadrature LO signals. The measured LNA noise figure is around 6.6 dB. Digital words are used to control the VGA gains and IQ mismatches through a Serial Peripheral Interface (SPI) to reduce the number of bond pads. The receiver chip has been mounted onto an application board, where an on-board Vivaldi antenna has already been fabricated. An overall conversion gain of 81 dB has been measured with tuning range larger than 30 dB. In a real in-door environment, error-free transmission with a data-rate of 3.6 Gbit/s has been observed over 15 meters.
    01/2011;
  • M. Elkhouly, S. Glisic, C. Scheytt
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    ABSTRACT: A high output 1 dB compression point 60-GHz up-conversion mixer fabricated on 0.25 μm SiGe:C technology is presented. It is based on the Gilbert cell and integrated with LO passive stacked Marchand balun to convert the LO single ended signal into differential. It employs tuned load consisting of spiral inductor and MIM capacitor to match the differential output to 100 ohm and to attenuate the image signal by 15 dB in the middle of the band. The conversion gain is 2.2-dB in 61 GHz and varies within 2 dB over 9 GHz band. We achieve output 1-dB compression point of -3.4 dBm. To the best of our knowledge it is the highest output 1-dB compression point in silicon-based 60-GHz mixers. It consumes 10 mA from 3.3 V supply.
    Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010 Topical Meeting on; 02/2010
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    ABSTRACT: Integrated millimeter-wave 2 bit and 3 bit phase shifters and 4 channel beamforming network are presented in this paper. The 2 bit phase shifter exhibits 4° RMS phase error and a RMS gain error
    Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM); 01/2010
  • 04/2009: pages 185 - 218; , ISBN: 9780470740125
  • S. Glisic, C. Scheytt
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    ABSTRACT: An integrated microstrip filter for 60 GHz applications with image suppression of 24 dB and insertion loss of 11 dB was designed and measured. This is the first integrated filter for 60 GHz applications. Filter dimensions are 0.24 mm<sup>2</sup>. An optimized compact integrated filter for IEEE 802.15.3c standard with insertion loss of 5 dB and image rejection of 30 dB was designed. We suggest optimization technique to reduce insertion loss of integrated filters. A compact, robust microstrip filter for 60 GHz applications on a PCB board, produced in an inexpensive technological process is presented.
    Microwave Conference, 2008. EuMC 2008. 38th European; 12/2008
  • S. Glisic, C. Scheytt
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    ABSTRACT: A fully integrated differential power amplifier (PA), produced in 0.25 mum SiGe:C BiCMOS process for 60 GHz application is presented. Differential 1 dB compression point (P1dB) at the output is 13.5 dBm at 61.5 GHz and as high as 17 dBm at 65 GHz. Saturated power is 18.7 dBm at 61.5 GHz and maximum 19 dBm at 66 GHz. PA features three-stage cascade topology with measured gain of 33 dB at 61 GHz. The amplifier is selective with 20 dB image rejection at 51 GHz, which is image frequency for the targeted transmitter architecture. Compact differential design resulted in small size of 0.6 mm<sup>2</sup> with pads. Maximum power-aided efficiency (PAE) is 7.8% for 800 mW power consumption, and 10.2% for 600 mW.
    Bipolar/BiCMOS Circuits and Technology Meeting, 2008. BCTM 2008. IEEE; 11/2008

Publication Stats

108 Citations
13.25 Total Impact Points

Institutions

  • 2008–2011
    • Institute for High Performance Microelectronics
      Frankfort on the Oder, Brandenburg, Germany
    • University of Bristol
      • Department of Electrical and Electronic Engineering
      Bristol, ENG, United Kingdom
  • 2007
    • Klinikum Frankfurt (Oder) GmbH
      Frankfort on the Oder, Brandenburg, Germany