T. Onizawa

Publications (2)0 Total impact

• Conference Proceeding: Impact of Crystalline Phase of Ni-Full-Silicide Gate Electrode on TDDB Reliability of HfSiON Gate Stacks

  T. Onizawa, M. Terai, A. Toda, M. Oshida, N. Ikarashi, T. Hase, S. Fujieda, H. Watanabe
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  ABSTRACT: We investigated the influences of gate metals (poly-Si, NiSi, Ni ₃Si) on the time dependent dielectric breakdown (TDDB) reliability of phase-controlled Ni-full-silicide/HfSiON n-FETs. The TDDB reliability of the NiSi-electrode FETs was comparable to that of poly-Si-electrode FETs. However, the reliability was degraded by further Ni-enriching to Ni₃Si. We presume that the degradation of the base SiO₂ layer is responsible for this. We do not relate the TDDB degradation to Ni diffusion into the insulator, but rather to the strain that is higher in Ni₃Si samples
  Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International; 04/2006
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  Conference Proceeding: Ultra-uniform threshold voltage in SONOS-type non-volatile memory with novel charge trap layer formed by plasma nitridation

  H. Sunamura, K. Masuzaki, M. Terai, S. Kotsuji, T. Onizawa, A. Morioka, T. Ikarashi, N. Ikarashi, S. Fujieda, H. Watanabe
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  ABSTRACT: We have proposed a new method to prepare thin nitrogen-based charge trap layer for scaled-down SONOS with thin EOT (<12nm). Devices employing an ONO prepared by the newly proposed method, a N₂-plasma treated base oxide topped by an HTO, showed unprecedented V_th uniformity, carrier localization and good retention characteristics. An overall comparison with Si₃N ₄-SONOS is given. They also offer excellent transistor characteristics (high on-current and low V_th), making them ideal for future scaled low-voltage embedded applications with fast readout
  Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st; 02/2006