[Show abstract][Hide abstract] ABSTRACT: High quality nanocrystalline silicon (nc-Si) film was deposited by inductively coupled plasma chemical vapor deposition (ICP-CVD) without substrate RF bias at 350°C. The nc-Si with a dense crystalline structure of the columnar type grew from the bottom to the top of the nc-Si film. A troublesome incubation layer did not exist at the bottom of the fabricated nc-Si film. A grain size of 40nm was measured by using a SEM image. When a RF bias of 100 and 200W was applied to the substrate to induce ion bombardment on the substrate, the crystalline structure and grains were not observed and a-Si deposition became dominant. The transition from nc-Si deposition into a-Si deposition can be attributed to ion bombardment which prevents nucleation and crystal growth at the surface of deposition. This shows that the reduction of ion bombardment can be a key factor to fabricate high quality nc-Si film. By using ICP-CVD with no substrate RF bias, ion bombardment can be reduced, while the density of plasma is kept high, so that high quality nc-Si can be fabricated due to the enhancement of crystalline growth on the surface.
Journal of Non-Crystalline Solids 05/2008; 354(19):2268-2271. · 1.72 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: We fabricated a new top-gate n-type depletion-mode polycrystalline silicon (poly-Si) thin-film transistor (TFT) employing alternating magnetic-field-enhanced rapid thermal annealing. An n<sup>+</sup> amorphous silicon (n<sup>+</sup> a-Si) layer was deposited to improve the contact resistance between the active Si and source/drain (S/D) metal. The proposed process was almost compatible with the widely used hydrogenated amorphous silicon (a-Si:H) TFT fabrication process. This new process offers better uniformity when compared to the conventional laser-crystallized poly-Si TFT process, because it involves nonlaser crystallization. The poly-Si TFT exhibited a threshold voltage (V<sub>TH</sub>) of -7.99 V at a drain bias of 0.1 V, a field-effect mobility of 7.14 cm<sup>2</sup>/V ldr s, a subthreshold swing (S) of 0.68 V/dec, and an ON/OFF current ratio of 107. The diffused phosphorous ions (P<sup>+</sup> ions) in the channel reduced the V<sub>TH</sub> and increased the S value.
IEEE Electron Device Letters 03/2008; · 3.02 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The purpose of our work is to report the characteristics of nanocrystalline silicon (nc-Si) thin films deposited by inductively coupled plasma chemical vapor deposition (ICP-CVD) without substrate heating suitable for low temperature process thin film devices which can be applied to flexible electronics. For flexible displays, it is inevitable to limit the process temperature to avoid deforming substrates like plastics.
Semiconductor Device Research Symposium, 2007 International; 01/2008
[Show abstract][Hide abstract] ABSTRACT: We have investigated a short channel (L≤1 μm) effect on the electrical reliability of the low temperature poly-Si thin film transistors (TFT) on a glass substrate. The threshold voltage of the p-type poly-Si TFT was observed to be decreased due to the drain induced barrier lowering as the channel length decreased. In the n-type poly-Si TFT with a lightly-doped-drain (LDD), the threshold voltage was slightly decreased when a high drain voltage was applied, while the field effect mobility decreased due to the series resistance of the LDD region in the short channel poly-Si TFT. As the temperature increased, the field effect mobility increased about 80% due to the increase of the thermal activated carrier concentration. We have also investigated the degradation of a short channel poly-Si TFT under hot carrier and self-heating stress. After hot carrier stress (VGS=2V, VDS=15V), the field effect mobility was considerably decreased up to 20% due to the trap state generation induced by the hot carrier. The subthreshold slope and threshold voltage were scarcely degraded. After the self-heating stress (VGS=VDS=15V), the subthreshold slope, mobility, and threshold voltage were degraded. Transfer characteristics measured at the high drain voltage (VDS=10V) were shifted to a negative direction because of hole trapping at the backside interface between the polysilicon film and buffer oxide on the glass substrate.
Thin Solid Films 07/2007; 515(19):7402-7405. · 1.87 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: We have investigated the plasma hydrogenation effect on a nanocrystalline silicon (nc-Si) thin film transistor (TFT) fabricated by inductively coupled plasma chemical vapor deposition (ICP-CVD) at 150 °C. The top-gate nc-Si TFT showed a mobility of ∼6 cm2/Vs and Vth of 8 V. The hydrogenation employing ICP-CVD was performed at 100 °C for 4 min in order to improve the characteristics of nc-Si TFT. The mobility was increased from ∼6 cm2/Vs to 11 cm2/Vs. The Vth of the nc-Si TFTs was decreased to about 6.8 V from 8.1 V. The on-current at the saturation regime also increased by 66% while the off current was increased slightly. The improvement of mobility, threshold voltage and on-current can be attributed to the hydrogen passivation of the Si dangling bonds in the nc-Si film. The experimental results showed that the 100 °C ICP-CVD hydrogenation is effective to improve the 150 °C nc-Si TFT.
Thin Solid Films 07/2007; 515(19):7442-7445. · 1.87 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: High-voltage AlGaN/GaN HEMTs (high-electron-mobility transistors) are fabricated by employing SiO<sub>2</sub> passivation and the degradation due to the hot carrier stress has been investigated. Our experimental result shows that the SiO<sub>2</sub> passivation of AlGaN/GaN HEMT successfully achieves the breakdown voltage of 1 kV without any field plate design. The pulsed I-V measurement for AlGaN/GaN HEMT shows that the SiO<sub>2</sub> passivation suppresses the frequency dispersion and decreases the on-resistance from 2.46 to 1.38 mOmega-cm<sup>2</sup>. The hot carrier stress degrades the electric characteristics of AlGaN/GaN HEMT because the high field increases the trapping at the surface and the interface. However, the SiO<sub>2</sub> passivation of AlGaN/GaN HEMT decreases the surface trapping and 2DEG depletion during the hot carrier stress, so that a passivated device exhibits less degradation than an unpassivated one. After the hot carrier stress with V<sub>DS</sub>=30 V and V<sub>GS</sub>=10 V is applied to the device for 5times10<sup>4</sup> sec, the SiO<sub>2</sub> passivation decreases the stress-induced degradation of forward drain current from 30.4 to 24.5 %.
Power Semiconductor Devices and IC's, 2007. ISPSD '07. 19th International Symposium on; 06/2007
[Show abstract][Hide abstract] ABSTRACT: We have successfully fabricated top gate nanocrystalline silicon (nc-Si) thin film transistor (TFT) using an inductively coupled plasma chemical vapor deposition (ICP-CVD) at substrate temperature of 180°C with various nc-Si thicknesses. The field effect mobilities of conventional top gate TFTs with the nc-Si thicknesses of 60, 90 and 130 nm are 26, 77 and 119 cm2/Vsec due to the increase of nc-Si grain size, respectively. However, the leakage current measured at VGS=-4.4 V increased with increase of nc-Si thickness because channel resistance increased. We fabricated a new in-situ process in order to suppress leakage current. The new in-situ process for the protection of the interface from the native oxide and impurities in the air is the continuous deposition of nc-Si and SiO2 layers without any vacuum break. The leakage current of the nc-Si TFT was successfully suppressed from 5.2x10-9 to 3.6x10-10. A by employing the new in-situ process. The subthreshold swing was reduced from 274 to 230 mV/dec and the field effect mobility was improved from 77 to 99 cm2/Vsec, respectively.
[Show abstract][Hide abstract] ABSTRACT: Polycrystalline silicon thin film transistors (poly-Si TFTs) fabricated at low temperature (under 200°C) have been widely investigated for flexible substrate applications such as a transparent plastic substrate. Unlike the conventional TFT process using glass substrate, the maximum process temperature should be kept less than 200°C in order to avoid thermal damage on flexible substrates. We report the characteristics of nanocrystalline silicon (nc-Si) irradiated by an excimer laser. Nc-Si precursors were deposited on various buffer layers by inductively coupled plasma chemical vapour deposition (ICP-CVD) at 150°C. We employed various buffer layers, such as silicon nitride (SiNX) and silicon dioxide (SiO2), in order to report recrystallization characteristics in connection with a buffer layer of a different thermal conductivity. The dehydrogenation and recrystallization was performed by step-by-step excimer laser annealing (ELA) (XeCl,λ=308 nm) in order to prevent the explosive release of hydrogen atoms. The grain size of the poly-Si film, which was recrystallized on the various buffer layers, was measured by scanning electron microscopy (SEM) at each laser energy density. The process margin of step-by-step ELA employing the SiNX buffer layer is wider than SiO2 and the maximum grain size slightly increased.
Physica Scripta 08/2006; 2006(T126):85. · 1.03 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: A post-annealing method employing excimer laser pulses is proposed to improve the transfer characteristics and the breakdown voltage of unpassivated AlGaN/GaN heterostructure field-effect transistors (HFETs) for switching devices. XeCl excimer laser pulses with a wavelength of 308 nm anneal the unpassivated AlGaN/GaN HFET after Schottky gate metallization. The interface defects between the Schottky gate metal and the GaN layer are decreased by the lateral heat diffusion of the laser pulses. The temperature of the device during the laser pulse is analysed by the one-dimensional heat diffusion equation. Our experimental results show that the drain current and the maximum transconductance of the AlGaN/GaN HFET after 10 laser pulses are 496 and 134 mS mm−1, while a virgin device shows 434 and 113 mS mm−1, respectively. The measured leakage current of the AlGaN/GaN HFET at VG=−6 V is decreased from 1.95 to 1.53 mA mm−1 after 600 laser pulses. The breakdown voltage of the AlGaN/GaN HFET is increased due to the decreased leakage current.
Physica Scripta 08/2006; 2006(T126):27. · 1.03 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: Organic thin film transistors (OTFTs) which employ indium tin oxide (ITO) as source and drain electrodes instead of gold are fabricated. A double gate dielectric layer was used, which consists of benzocyclobutane (BCB) and silicon nitride (SiNx). The pentacene TFT has lateral dimensions 192 μm×6 μm. The OTFT with the ITO bottom electrode shows a saturation mobility of 0.05~0.09 cm2 V−1 s−1 and an on-off current ratio of the order of 105 in a gate voltage span between 0 and −40 V. The TFT fabrication process steps had the beneficial side effect of changing the ITO surface from hydrophilic to hydrophobic. This change allows pentacene films with larger grains, observed up to 0.5 μm, to be grown on TFT compared to as-deposited ITO film onto which high quality films cannot be grown.
Physica Scripta 08/2006; 2006(T126):41. · 1.03 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: A new inductively coupled plasma-chemical vapor deposition (ICP-CVD) SiO<sub>2</sub> passivation for high voltage switching AlGaN/GaN high electron mobility transistors (HEMTs) is proposed to increase the breakdown voltage and the forward drain current. AlGaN/GaN HEMTs are fabricated and measured before and after SiO<sub>2</sub> passivation. The measured off-state breakdown voltage of SiO<sub>2</sub> passivated device is 455 V, whereas that of the unpassivated device is 238 V. The surface leakage current of AlGaN/GaN HEMTs are decreased due to SiO<sub>2</sub> passivation. The forward drain currents of SiO<sub>2 </sub> passivated devices are increased by 20 %~35 % because two-dimensional electron gas (2DEG) charge is increased and the electron injections to the surface traps are decreased. SiO<sub>2</sub> passivation is more suitable for high voltage switching AlGaN/GaN HEMTs than Si<sub>3</sub>N<sub>4</sub> passivation due to a high breakdown voltage and a low leakage current
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on; 07/2006
[Show abstract][Hide abstract] ABSTRACT: Hydrogenated microcrystalline silicon (muc-Si:H) film was fabricated by inductively coupled plasma-chemical vapor deposition (ICP-CVD) at 150 °C on ZrO2 gate dielectric which was made by atomic layer deposition (ALD) method. muc-Si:H film with very thin incubation layer less than 10 nm was deposited on ZrO2 film. Polycrystalline ZrO2 played a role of crystal seed layer to enhance the crystalline fraction of muc-Si:H film. Surface roughness of ZrO2 film increased as deposition temperature of ZrO2 was increased. Rougher surface of ZrO2 film provided nucleation site of muc-Si:H film at early growth stage to reduce the thickness of the incubation layer. The crystalline fraction of muc-Si:H film depended on crystallinity of ZrO2. When muc-Si:H film was deposited on ZrO2 of 100 and 50 nm thickness at 250 °C, (200) and (111) peak intensity was increased respectively.
Japanese Journal of Applied Physics 05/2006; 45:4365-4369. · 1.06 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: Electrical characteristics, such as capacitance–voltage characteristics (C–V) and break-down field, of SiO2 films deposited on plastic substrates by inductively coupled plasma chemical vapor deposition at 150 °C were improved by excimer laser annealing and N2O plasma pre-treatment. Excimer laser annealing at an energy density of 250 mJ/cm2 produced a flat-band voltage of the SiO2 film shifted close to 0 V while the effective oxide charge density considerably reduced. The breakdown field was improved from 7 MV/cm to 9.5 MV/cm after N2O plasma treatment. By employing excimer laser annealing and N2O plasma pre-treatment, the flat-band voltage was improved from −9 V to −1.8 V and the effective charge density was reduced to the level found for TEOS SiO2 deposited at 400 °C.
Journal of Non-Crystalline Solids 01/2006; 352:1434-1437. · 1.72 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The nc-Si films where the troublesome incubation layer was almost eliminated were deposited by inductively coupled plasma chemical vapor deposition (ICP-CVD) under various dilution conditions. The nc-Si films were analyzed with cross-sectional high resolution transmission electron microscopy (HR-TEM) images. It was verified that the Si crystalline components formed and grew from the surface of buffer layer. The grain size of 20~50nm was measured. The absence of incubation layer in nc-Si film may be attributed mainly to ICP-CVD which generates remote plasma of high density, the role of hydrogen, and the dilution effect on the growth of crystalline. Our experimental results show that incubation-free nc-Si film deposited by ICP-CVD may be suitable for the active layer of bottom gate nc-Si TFTs as well as top gate nc-Si TFTs.
[Show abstract][Hide abstract] ABSTRACT: We have fabricated nanocrystalline Si (nc-Si) TFTs at 150°C using inductively coupled plasma chemical vapor deposition (ICP-CVD). A nc-Si film with large grains exceeding 300Å and a SiO2 film with high breakdown field were deposited by ICP-CVD. A high mobility of 7.1cm2/Vs with a low sub-threshold swing of 0.33V/dec was obtained.
SID Symposium Digest of Technical Papers 01/2005; 36(1).