A. Simoni

Fondazione Bruno Kessler, Trient, Trentino-Alto Adige, Italy

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Publications (75)38.95 Total impact

  • David Stoppa, Andrea Simoni
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    ABSTRACT: We live in a three-dimensional (3D) world and thanks to the stereoscopic vision provided by our two eyes, in combination with the powerful neural network of the brain we are able to perceive the distance of the objects. Nevertheless, despite the huge market volume of digital cameras, solid-state image sensors can capture only a two-dimensional (2D) projection, of the scene under observation, losing a variable of paramount importance, i.e., the scene depth. On the contrary, 3D vision tools could offer amazing possibilities of improvement in many areas thanks to the increased accuracy and reliability of the models representing the environment. Among the great variety of distance measuring techniques and detection systems available, this chapter will treat only the emerging niche of solid-state, scannerless systems based on the TOF principle and using a detector SPAD-based pixels. The chapter is organized into three main parts. At first, TOF systems and measuring techniques will be described. In the second part, most meaningful sensor architectures for scannerless TOF distance measurements will be analyzed, focusing onto the circuital building blocks required by time-resolved image sensors. Finally, a performance summary is provided and a perspective view for the near future developments of SPAD-TOF sensors is given.
    08/2011: pages 275-300;
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    ABSTRACT: We report on visible light emission from Si quantum dot (QD) based optically active microdisk resonators. Room temperature photoluminescence from single microdisks shows the characteristic modal structure of whispering-gallery modes (WGM). Highest quality factors of up to 7000 at visible wavelengths, where Si QDs absorb strongly, have been measured for the first time. Apart from conventional flat and circular resonators, we demonstrate for the first time a new class of active microdisk resonators with out-of-plane bending. In these devices, composed of silicon nitride, Si3N4 and Si QD-rich silicon oxide, SiOx, materials, the engineered stress at the interfaces results in bent-up (cup-like) and bent-down (umbrella-like) resonators, depending on which material is used as a top layer. Both type of bent devices support perfectly WGMs and, quite unexpectedly, offer a rich and interesting physics, in particular, the possibility of tuning and enhancing the Q-factor band of WGM modes in bent disks. Generally, the wavelength dispersion of two main different loss-channels, the material absorption and radiative losses, result in a limited bandwidth where the highest Q-factors can be observed (Qband). We show here, that in a bent resonator, with respect to a flat one (same diameter, thickness and amount of Si3N4 and SiOx materials in both), the maximum of the Q-factor band blue-shifts by more than 70nm (from 832nm to 760nm). In addition, the absolute maximum of Q-band in a bent resonator is 3-4 times higher than that of the flat disk at the wavelength of 760nm. We explain this phenomenon by a smart interplay between the modified dispersions of material absorption and radiative loss related Q-factors (simultaneous increase of Qmat and decrease of Qrad). Importantly, this tuning scheme does not require larger device sizes, but rather utilizes self-adjustment properties of originally stressed resonator core. Remarkably, the bent resonators benefit from unmodified free-spectral range and cleaner WGM spectra due to the absence of higher order mode families.
    SPIE Symposium on Microtechnologies for the New Millennium, Dresden (Germany); 05/2009
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    ABSTRACT: A CMOS interface for a piston-type MEMS capacitive microphone is presented. It performs a capacitance-to-voltage conversion by bootstrapping the sensor through a voltage pre-amplifier, feeding a third-order sigma-delta modulator. The bootstrapping performs active parasitic compensation, improving the readout sensitivity by ~12 dB. The total current consumption is 460 uA at 1.8 V-supply. The digital output achieves 80 dBA-DR, with 63 dBA peak-SNR, using 0.35 um 2P/4M CMOS technology. The paper includes electrical and acoustic measurement results for the interface.
    Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European; 10/2008
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    ABSTRACT: In this paper, an all-analog pixel architecture for the readout of X-ray pixel detectors with multiple energy discrimination is proposed. The circuit comprises a self-triggered reset charge amplifier and three distinct channels devoted to the detection on a specific energy band. Each channel is composed of an autocalibrated comparator, an energy window identification logic, and an analog counter with an adjustable dynamic range. A test prototype has been implemented with a standard complementary metal-oxide-semiconductor 0.35-mum technology. The pixel circuitry dissipates 15 muW at 3.3 V, has a noise equivalent charge of 82 e<sub>rms</sub> <sup>-</sup> at 200 fF, and allows, on each of the three channels, a dynamic range that exceeds 12 bits. The designed pixel is a square with a 109-mum pitch.
    IEEE Transactions on Instrumentation and Measurement 08/2008; DOI:10.1109/TIM.2008.917180 · 1.71 Impact Factor
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    ABSTRACT: This paper describes an uncooled infrared thermal imager fabricated with a standard CMOS process (AMS 0.8μm) and a compatible front-side bulk micromachining post-process based on a TMAH solution. The fabrication approach does not involve any material deposition, lithography step or particular etch-stop technique after the CMOS process flow, so that the imager cost is almost equal to that of the CMOS chip cost. The infrared imager is composed of a focal plane array (FPA) with 16 × 16 thermopile pixels monolithically integrated with the addressing and readout electronics. The optical measurements performed with the fabricated devices have shown a responsivity S of 15.0 V/W, a noise equivalent power NEP of 1.37 nW/Hz1/2 and a normalized detectivity D* of 1.05 · 107 cm·Hz1/2-W1 for the infrared pixel. The readout channel features a maximum gain of 85dB with an equivalent input noise of 22 nV/Hz1/2. An infrared imager based on the FPA has been build and thermal imaging has been demonstrated.
    Sensors and Microsystems - 11th Italian Conference; 01/2008
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    ABSTRACT: We report on a novel CMOS photon mixing sensor aimed at distance measurements, which can be fabricated in a standard CMOS technology. This device can be organized in array structures to realize range-finding integrated imagers. The measurement exploits the time of flight technique: the modulated light travels to a target and is back-scattered onto the detector. The distance is proportional to the phase shift between incident and reflected light. The photon mixing sensor, based on two interdigitated n-well diffusions on a p substrate, has been integrated together with dedicated read-out electronics, in a 500 μm × 25 μm pixel. The operation principle is based on the modulation of the space-charge region width by the applied voltage. A 128-pixel linear array has been designed in 0.35-μm 3.3-V CMOS technology (4 metal, 2 poly). An electro-optical characterization of dedicated test structures has been carried out.
    Sensors and Microsystems - 10th Italian Conference; 01/2008
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    ABSTRACT: In this paper an all-analog pixel architecture for the readout of X-ray pixel detectors is proposed, comprising a self-triggered reset charge amplifier, three autocalibrated comparators, an energy window identification logic and three analog counters with adjustable dynamic range. A prototype has been built with a standard CMOS 0.35 mum technology: the pixel pitch is 109 mum, dissipates 15 muW at 3.3 V supply, has a noise equivalent charge of 82erms - at 200 fF and allows on each of the three channels a dynamic-range that exceeds 12-bit
    Conference Record - IEEE Instrumentation and Measurement Technology Conference 01/2008; 57:1438-1444. DOI:10.1109/IMTC.2006.328396
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    ABSTRACT: A high dynamic range CMOS image sensor providing a user-programmable power responsivity curve is presented. Each pixel integrates, besides a 4T active pixel structure, a voltage comparator and an analog memory to implement a time-to-saturation scheme while also providing the standard integrated photo-current signal. The sensor generates two 10-bit analog outputs allowing a typical dynamic range exceeding 120 dB with a temporal noise lower than 0.13% and a fixed pattern noise of 0.4% (1.7%) of the total signal swing (2 V) at low (high) irradiance without any external calibration procedures. A 140 times 140-pixel array has been fabricated in a 0.35-mum, two-poly four-metal (2P4M), 3.3-V standard CMOS technology. The chip measures 3.9 times 4.6 mm<sup>2</sup> with a pixel pitch of 15 mum and a fill factor of 20%.
    IEEE Journal of Solid-State Circuits 08/2007; DOI:10.1109/JSSC.2007.899089 · 3.11 Impact Factor
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    ABSTRACT: A 64-pixel linear array aimed at 3-D vision applications is implemented in a high-voltage 0.8 mum CMOS technology. The detection of the incident light signals is performed using photodiodes biased above breakdown voltage so that an extremely high sensitivity can be achieved exploiting the intrinsic multiplication effect of the avalanche phenomenon. Each 38times180-mum<sup>2</sup> pixel includes, besides the single photon avalanche diode, a dedicated read-out circuit for the arrival-time estimation of incident light pulses. To increase the distance measurement resolution a multiple pulse measurement is used, extracting the mean value of the light pulse arrival-time directly in each pixel; this innovative approach dramatically reduces the dead-time of the pixel read-out, allowing a high frame rate imaging to be achieved. The sensor array provides a range map from 2 m to 5 m with a precision better than plusmn0.75% without any external averaging operation. Moreover, with the same chip, we have explored for the first time the implementation of an indirect time-of-flight measurement by operating the proposed active pixel in the photon counting mode
    Circuits and Systems I: Regular Papers, IEEE Transactions on 02/2007; DOI:10.1109/TCSI.2006.888679 · 2.30 Impact Factor
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    ABSTRACT: This paper reports the design, fabrication and assessment of a low-cost uncooled infrared imager that has been conceived as a general purpose system to be used in a wide range of infrared applications. The imager has been fabricated using the AMS 0.8 μm CYE CMOS process together with a compatible front-side bulk micromachining post-process provided by the CMP service of the TIMA laboratory. The adopted fabrication approach does not involve any lithography step, material deposition or particular etch-stop technique after the CMOS process, so that the imager cost is almost equal to the CMOS chip cost. The infrared imager is composed of a focal plane array (FPA) with 16 × 16 thermopile pixels, which are monolithically integrated with the addressing and readout electronics. Each pixel consists of a thermally isolated micromachined membrane suspended by two arms that contain the polysilicon/aluminium thermocouples of the embedded thermopile sensor. The pixel membrane also includes a heating resistor intended to implement a self-test function that allows an electrical test of the FPA without need of specific infrared equipment. Since the voltage levels generated by the thermopile pixels are in the range of a few μV the readout channel consists of a low-noise voltage amplifier with a high variable gain that can be tuned for different operation conditions. The readout circuit makes use of the chopper principle and the correlated double sampling technique to reduce the noise floor and the amplifier offset levels. Optical measurements performed with the fabricated prototypes have shown a pixel responsivity of 15.0 V/W, a noise equivalent power of 1.37 nW and a normalized detectivity of 1.05 × 107 cm Hz1/2 W−1, values that are in line with current state of the art. The readout channel features a maximum gain of 85 dB with a 4.3 kHz bandwidth and an equivalent input noise of 22 nV/Hz1/2. An infrared imager based on the FPA has been build and thermal imaging has been demonstrated.
    Sensors and Actuators A Physical 11/2006; DOI:10.1016/j.sna.2006.04.027 · 1.94 Impact Factor
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    ABSTRACT: A single photon avalanche diode detector for the analysis of fluorescence phenomena is presented. The 14-pixels array, fabricated in a conventional high voltage 0.35-mum CMOS technology, allows measuring photon densities as low as 10<sup>8</sup> photons/cm<sup>2</sup>s. Each 180times150-mum<sup>2</sup> pixel integrates a single photon avalanche diode combined with an active quenching circuit and a 17-bit digital events counter. On chip master logic provides the digital control phases required by the pixel array with a full programmability of the main timing synchronisms. Time-resolved measurements has been demonstrated by detecting a 10ns, 10pW (peak-power on the pixel) light pulse with a typical resolution of 80ps
    Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European; 10/2006
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    ABSTRACT: A microsystem composed of a micromachined resistive flow sensor and a signal conditioning CMOS IC is proposed for biomedical applications. The device can be adapted to noninvasively monitor urinary dysfunctions in male patients. The flow sensor, thermally simulated with ANSYS, is based on the hot-film principle: A thin film of gold laid on a suspended micromachined silicon membrane is heated while the fluid under test flows through the duct mounted above the membrane. The flow rate is sensed by measuring the temperature difference between two of the four polysilicon temperature sensors realized on the membrane. Simulations of the flow sensor with flow rates within 0.1-18 ml/s evidence a maximum temperature difference of 20degC between the temperature sensors. Characterization of the fabricated flow sensor shows temperature coefficient of resistance (TCR) values of -1930 ppm/degC for the polysilicon resistors, i.e., a resistance variation of about 4% at high flow rates. The CMOS readout designed for the flow sensor is a resistive bridge-to-duty cycle converter based on a relaxation oscillator. The digital output of the circuit is duty-cycle modulated by the change in resistance of the flow sensor's elements. Experimental tests on the CMOS interface, conducted with a setup of 1% precision resistors, report a maximum nonlinearity below 0.9% and a resolution of 7 bits over the full range of 4% resistance variation. The CMOS integrated readout circuit, provided with a digital output, allows simple signal interfacing towards any standard PC for periodical data transfer and storage
    IEEE Transactions on Instrumentation and Measurement 07/2006; 55(3-55):964 - 971. DOI:10.1109/TIM.2006.864242 · 1.71 Impact Factor
  • M. Gottardi, N. Massari, A. Simoni
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    ABSTRACT: A 128 times 64 pixels vision sensor is presented, performing on-the-fly spatio-temporal filtering with large flexibility in coefficient assignment. Its operating principle is based on two novel image processing techniques: time-based and pulse-based. The sensor architecture executes pixel-parallel processing, on a 3 times 3 pixel kernel, during integration time on images with dynamic-range up to about 100 dB. The square pixel has a pitch of 32.6 mum with a fill-factor of 24%. It consists of two analog memories and 30 transistors, most of them dedicated to the pixel connectivity. The chip was fabricated in a 0.35 mum CMOS technology and exhibits a total power consumption of 14 mW @ 3.3 V with a computing figure of 2.8 GOPS/mm<sup>2</sup>
    Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE; 05/2006
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    ABSTRACT: A complete front-end system for resistive gas sensor array is presented. The interface is composed by 8 read-out channels and by 2 closed-loop temperature control circuits. The IC gas sensor read-out structure is based on a controlled oscillator, which acts like a resistance-to-period converter, and achieves a 0.5%-linearity over 500 kOmega-1 GOmega sensor resistance range with a SNR better than 48 dB, corresponding to 114 dB-DR. The temperature control systems allows maintaining a 100degC gradient on the array of sensor, selected in the temperature range 100degC-400degC, with a plusmn2.5degC accuracy. The full device is designed in a standard 0.35 mum CMOS technology. The die area is 1.8 mm<sup>2</sup> with a total power consumption of 27 mW from a single 3.3 V supply voltage
    Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE; 05/2006
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    ABSTRACT: The interface IC includes 8 read-out channels and 2 closed-loop temperature control circuits, is fabricated in 0.35mum 2P4M CMOS and dissipates 27mW from a 3.3V supply. The read-out structure, based on a controlled oscillator, achieves a 0.5% linearity and a SNR >48dB over the 500kOmega-1GOmega sensor resistance range with a 114dB DR. The temperature control systems maintain a 100degC gradient in the range 100 to 400degC with plusmn2.5degC accuracy
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International; 03/2006
  • N. Massari, M. Gottardi, A. Simoni
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    ABSTRACT: A novel pixel topology for real-time programmable image processing is presented. The circuit can implement a large class of spatio-temporal filters over a 3×3 pixels kernel. The image processing is based on two fundamental operations: absolute value of a difference and signal accumulation of partial results. On-the-fly processing approach is used to perform image filtering over high dynamic-range images. The pixel, designed in a CMOS 0.35¿m technology, has square shape with a side of 32.5 ¿m, consists of 30 transistors and presents a fill factor of 24%.
    Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on; 01/2006
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    ABSTRACT: An optical sensor architecture optimized for flying-spot, triangulation-based, three-dimensional (3-D) laser scanners will be presented. The architecture implements a spot-position detection algorithm based on a two-step procedure that allows for improved dynamic range and readout speed. The sensor, which contains two linear arrays of pixels, analog readout channels, and digital signal preprocessing circuitry, has been fabricated in 0.6-μm CMOS double-poly triple-metal technology and measures 8.17×5.67 mm<sup>2</sup>. Pixel size and shape have been selected for reducing the effect of laser speckle and for the possibility of measuring color in a multiwavelength 3-D scanner. Electrooptical test results confirm the sensor behavior as expected from simulations on a dynamic range of 80 dB and exhibits a maximum speed of 50-k voxel/s.
    IEEE Sensors Journal 01/2006; 5(6-5):1296 - 1304. DOI:10.1109/JSEN.2005.859217 · 1.85 Impact Factor
  • M. Gottardi, N. Massari, A. Simoni
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    ABSTRACT: In this contribution, the research activity on CMOS pro- grammable vision sensors, carried out at ITC-irst, is presented, with special attention on pixel-parallel architectures for low-level real- time processing tasks. Different pixel topologies are described for full-kernel spatio-temporal filtering, featuring a good tradeoff be- tween pixel-pitch, fill-factor and power consumption (1-4). Thanks to the switched capacitor pixel implementation, all the vision processing can be accomplished by simply changing the sensor timing diagram, which is the key idea of the presented vision sensors. Moreover, a novel approach for on-the-fly image processing over high dynamic- range images is described, adopting integration time sharing and oversampling techniques, which allow integration time and process- ing time to be overlapped, offering new ways of implementing on-chip real-time image processing.
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    ABSTRACT: A prototype of a 34 x 34 pixel image sensor, implementing real-time analog image processing, is presented. Edge detection, motion detection, image amplification, and dynamic-range boosting are executed at pixel level by means of a highly interconnected pixel architecture based on the absolute value of the difference among neighbor pixels. The analog operations are performed over a kernel of 3 x 3 pixels. The square pixel, consisting of 30 transistors, has a pitch of 35 microm with a fill-factor of 20%. The chip was fabricated in a 0.35 microm CMOS technology, and its power consumption is 6 mW with 3.3 V power supply. The device was fully characterized and achieves a dynamic range of 50 dB with a light power density of 150 nW/mm2 and a frame rate of 30 frame/s. The measured fixed pattern noise corresponds to 1.1% of the saturation level. The sensor's dynamic range can be extended up to 96 dB using the double-sampling technique.
    IEEE Transactions on Neural Networks 12/2005; 16(6):1673-84. DOI:10.1109/TNN.2005.854369 · 2.95 Impact Factor

Publication Stats

526 Citations
38.95 Total Impact Points

Institutions

  • 2008–2011
    • Fondazione Bruno Kessler
      Trient, Trentino-Alto Adige, Italy
  • 2003–2006
    • National Research Council Canada
      Ottawa, Ontario, Canada
  • 1999–2006
    • Museo delle Scienze, Trento, Italy
      Trient, Trentino-Alto Adige, Italy
  • 2002
    • University of Milan
      Milano, Lombardy, Italy
  • 1995
    • Istituto Scientifico Romagnolo per lo Studio e la Cura dei Tumori
      Meldola, Emilia-Romagna, Italy