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ABSTRACT: A low power 22bit incremental ADC, including an on-chip digital filter and a low noise/low drift oscillator, was realized in a 0.6-μm CMOS process. It incorporates a novel offset cancellation scheme based on fractal sequences, a novel high accuracy gain control circuit, and a novel reduced complexity realization for the on chip sine filter. The measured output noise was 0.28 ppm (2.8 μV<sub>RMS</sub>), the dc offset 2 μV, the gain error 2 ppm, and the INL 4 ppm. The chip operates with a single 2.7-5 V supply, and draws only 125 μA current during conversion.
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European; 10/2005
